| 8024393 |
Processor with improved accuracy for multiply-add operations |
John Kelley, Xingyu Jiang |
2011-09-20 |
| 7724261 |
Processor having a compare extension of an instruction set architecture |
Radhika Thekkath, G. Michael Uhler, Chandlee B. Harrell |
2010-05-25 |
| 7346643 |
Processor with improved accuracy for multiply-add operations |
John Kelley, Xingyu Jiang |
2008-03-18 |
| 7242414 |
Processor having a compare extension of an instruction set architecture |
Radhika Thekkath, G. Michael Uhler, Chandlee B. Harrell |
2007-07-10 |
| 6996596 |
Floating-point processor with operating mode having improved accuracy and high performance |
Xing Yu Jiang |
2006-02-07 |
| 6912559 |
System and method for improving the accuracy of reciprocal square root operations performed by a floating-point unit |
Michael Schulte, John Kelley |
2005-06-28 |
| 6732259 |
Processor having a conditional branch extension of an instruction set architecture |
Radhika Thekkath, G. Michael Uhler, Chandlee B. Harrell |
2004-05-04 |
| 6714197 |
Processor having an arithmetic extension of an instruction set architecture |
Radhika Thekkath, G. Michael Uhler, Chandlee B. Harrell |
2004-03-30 |
| 6697832 |
Floating-point processor with improved intermediate result handling |
John Kelley |
2004-02-24 |
| 6631392 |
Method and apparatus for predicting floating-point exceptions |
Xingyu Jiang, John Kelley |
2003-10-07 |
| 5500943 |
Data processor with rename buffer and FIFO buffer for in-order instruction completion |
Bradley Gene Burgess |
1996-03-19 |
| 5113364 |
Concurrent sticky-bit detection and multiplication in a multiplier circuit |
Peter Logan Harrod, Ashok H. Someshwar |
1992-05-12 |
| 4999796 |
Sticky bit detection and shifting logic |
Bernard C. DeWitt |
1991-03-12 |
