SM

Stephen Melvin

MT Mips Technologies: 16 patents #9 of 129Top 7%
TL Teplin Application Limited Liability: 8 patents #1 of 1Top 100%
📍 Vancouver, CA: #28 of 5,070 inventorsTop 1%
Overall (All Time): #56,675 of 4,157,543Top 2%
49
Patents All Time

Issued Patents All Time

Showing 26–49 of 49 patents

Patent #TitleCo-InventorsDate
7496721 Packet processor memory interface with late order binding 2009-02-24
7487304 Packet processor memory interface with active packet list 2009-02-03
7482910 Apparatus, system, and computer program product for presenting unsolicited information to a vehicle or individual 2009-01-27
7478209 Packet processor memory interface with conflict detection and checkpoint repair 2009-01-13
7475200 Packet processor memory interface with write dependency list 2009-01-06
7475201 Packet processor memory interface with conditional delayed restart 2009-01-06
7444481 Packet processor memory interface with memory conflict valve checking 2008-10-28
7441088 Packet processor memory conflict prediction 2008-10-21
7360217 Multi-threaded packet processing engine for stateful packet processing Mario Nemirovsky, Enrique Musoll, Jeffery Huynh 2008-04-15
7346710 Apparatus for input/output expansion without additional control line wherein first and second signals transition directly to a different state when necessary to perform input/output 2008-03-18
7319379 Profile-based messaging apparatus and method 2008-01-15
7280548 Method and apparatus for non-speculative pre-fetch operation in data packet processing Nandakumar Sampath, Enrique Musoll, Mario Nemirovsky 2007-10-09
7257814 Method and apparatus for implementing atomicity of memory operations in dynamic multi-streaming processors Mario Nemirovsky 2007-08-14
7197043 Method for allocating memory space for limited packet head and/or tail growth Enrique Musoll, Mario Nemirovsky 2007-03-27
7165257 Context selection and activation mechanism for activating one of a group of inactive contexts in a processor core for servicing interrupts Enrique Musoll, Mario Nemirovsky 2007-01-16
7155516 Method and apparatus for overflowing data packets to a software-controlled memory when they do not fit into a hardware-controlled memory Enrique Musoll, Mario Nemirovsky 2006-12-26
7139901 Extended instruction set for packet processing applications Enrique Musoll, Mario Nemirovsky 2006-11-21
7107402 Packet processor memory interface 2006-09-12
7065096 Method for allocating memory space for limited packet head and/or tail growth Enrique Musoll, Mario Nemirovsky 2006-06-20
7058064 Queueing system for processors in packet routing operations Mario Nemirovsky, Enric Musoll, Narendra Sankar, Nandakumar Sampath, Adolfo Nemirovsky 2006-06-06
7042887 Method and apparatus for non-speculative pre-fetch operation in data packet processing Nandakumar Sampath, Enrique Musoll, Mario Nemirovsky 2006-05-09
7035998 Clustering stream and/or instruction queues for multi-streaming processors Mario Nemirovsky, Nandakumar Sampath, Enrique Musoll, Hector Urdaneta 2006-04-25
6981110 Hardware enforced virtual sequentiality 2005-12-27
6922138 Vehicle specific messaging apparatus and method 2005-07-26