Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10007639 | PLL system with master and slave devices | Krste Mitric, Slobodan Milijevic, Wenbao Wang | 2018-06-26 |
| 10002090 | Method for improving the performance of synchronous serial interfaces | Mark A Warriner, Wenbao Wang | 2018-06-19 |
| 9667237 | Hardware delay compensation in digital phase locked loop | Qu Gary Jin, Paul H. L. M. Schram, Krste Mitric, Cathy Zhang, Wenbao Wang | 2017-05-30 |
| 9647674 | Apparatus for generating clock signals having a PLL part and synthesizer part with programmable output dividers | Paul H. L. M. Schram, Krste Mitric | 2017-05-09 |