Issued Patents All Time
Showing 51–74 of 74 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6154088 | Clocking scheme and charge transfer switch for increasing the efficiency of a charge pump or other circuit | Christophe J. Chevallier | 2000-11-28 |
| 6115291 | Healing cells in a memory device | — | 2000-09-05 |
| 6078985 | Memory system having flexible addressing and method using tag and data bus communication | Robert Norman, Christophe J. Chevallier | 2000-06-20 |
| 6078212 | VT cancellation in output stage of charge pump | — | 2000-06-20 |
| 6073204 | Memory system having flexible architecture and method | Robert Norman, Christophe J. Chevallier | 2000-06-06 |
| 6052303 | Apparatus and method for selecting data bits read from a multistate memory | Christophe J. Chevallier | 2000-04-18 |
| 6047352 | Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure | Christophe J. Chevallier, Mathew L. Adsitt | 2000-04-04 |
| 6034906 | High and negative voltage compare | Christophe J. Chevallier | 2000-03-07 |
| 6023427 | Voltage pump switch | Christophe J. Chevallier | 2000-02-08 |
| 6021459 | Memory system having flexible bus structure and method | Robert Norman, Christophe J. Chevallier | 2000-02-01 |
| 5995423 | Method and apparatus for limiting bitline current | Christophe J. Chevallier | 1999-11-30 |
| 5974499 | Memory system having read modify write function and method | Robert Norman | 1999-10-26 |
| 5959884 | Segmented non-volatile memory array with multiple sources with improved word line control circuitry | Christophe J. Chevallier | 1999-09-28 |
| 5959897 | System and method for writing data to memory cells so as to enable faster reads of the data using dual wordline drivers | Christophe J. Chevallier, Robert Norman, Darrell D. Binerson | 1999-09-28 |
| 5930175 | Voltage pump switch | Christophe J. Chevallier | 1999-07-27 |
| 5912837 | Bitline disturb reduction | — | 1999-06-15 |
| 5898637 | System and method for selecting shorted wordlines of an array having dual wordline drivers | Christophe J. Chevallier | 1999-04-27 |
| 5886935 | High and negative voltage compare | Christophe J. Chevallier | 1999-03-23 |
| 5835406 | Apparatus and method for selecting data bits read from a multistate memory | Christophe J. Chevallier | 1998-11-10 |
| 5818289 | Clocking scheme and charge transfer switch for increasing the efficiency of a charge pump or other circuit | Christophe J. Chevallier | 1998-10-06 |
| 5815458 | System and method for writing data to memory cells so as to enable faster reads of the data using dual wordline drivers | Christophe J. Chevallier, Robert Norman, Darrell Rinerson | 1998-09-29 |
| 5768287 | Apparatus and method for programming multistate memory device | Robert Norman, Christophe J. Chevallier | 1998-06-16 |
| 5687117 | Segmented non-volatile memory array with multiple sources having improved source line decode circuitry | Christophe J. Chevallier | 1997-11-11 |
| 5673224 | Segmented non-volatile memory array with multiple sources with improved word line control circuitry | Christophe J. Chevallier | 1997-09-30 |