Issued Patents All Time
Showing 101–125 of 126 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7215263 | Parallel-serial converter | Stefan Dietrich, Peter Schroegmeier | 2007-05-08 |
| 7156463 | Motor vehicle seat | Werner Taubmann | 2007-01-02 |
| 7016452 | Delay locked loop | Torsten Partsch, Thilo Marx, Patrick Heyne | 2006-03-21 |
| 6946848 | Calibration configuration | Andreas Täuber, Aaron Nygren | 2005-09-20 |
| 6928025 | Synchronous integrated memory | Thilo Marx, Patrick Heyne, Torsten Partsch | 2005-08-09 |
| 6882554 | Integrated memory, and a method of operating an integrated memory | Michael Markert, Christian Weis, Sabine Kieser, Stefan Dietrich, Peter Schrogmeier | 2005-04-19 |
| 6784650 | Circuit configuration for generating a controllable output voltage | Patrick Heyne, Thilo Marx, Torsten Partsch | 2004-08-31 |
| 6737901 | Integrable, controllable delay device, delay device in a control loop, and method for delaying a clock signal using a delay device | Patrick Heyne | 2004-05-18 |
| 6670802 | Integrated circuit having a test operating mode and method for testing a multiplicity of such circuits | Stefan Dietrich, Patrick Heyne, Thilo Marx, Sabine Kieser, Michael Sommer +4 more | 2003-12-30 |
| 6661265 | Delay locked loop for generating complementary clock signals | Torsten Partsch, Thilo Marx, Patrick Heyne | 2003-12-09 |
| 6657422 | Current mirror circuit | Patrick Heyne, Thilo Marx, Torsten Partsch | 2003-12-02 |
| 6584021 | Semiconductor memory having a delay locked loop | Patrick Heyne, Torsten Partsch, Marx Thilo | 2003-06-24 |
| 6542389 | Voltage pump with switch-on control | Stefan Dietrich, Patrick Heyne, Thilo Marx, Sabine Kieser, Michael Sommer +4 more | 2003-04-01 |
| 6532188 | Integrated memory having a row access controller for activating and deactivating row lines | Stefan Dietrich, Patrick Heyne, Thilo Marx, Torsten Partsch, Sabine Kieser +3 more | 2003-03-11 |
| 6480024 | Circuit configuration for programming a delay in a signal path | Stefan Dietrich, Patrick Heyne, Michael Markert, Thilo Marx, Torsten Partsch +4 more | 2002-11-12 |
| 6401224 | Integrated circuit and method for testing it | Sabine Schoniger, Peter Schrogmeier, Stefan Dietrich | 2002-06-04 |
| 6388944 | Memory component with short access time | Peter Schrogmeier, Stefan Dietrich, Torsten Partsch, Patrick Heyne, Thilo Marx | 2002-05-14 |
| 6366527 | Circuit configuration for generating an output clock signal with optimized signal generation time | Thilo Marx, Patrick Heyne, Torsten Partsch | 2002-04-02 |
| 6351167 | Integrated circuit with a phase locked loop | Thilo Marx, Patrick Heyne, Torsten Partsch | 2002-02-26 |
| 6285228 | Integrated circuit for generating a phase-shifted output clock signal from a clock signal | Patrick Heyne, Torsten Partsch, Thilo Marx | 2001-09-04 |
| 6285176 | Voltage generator with superimposed reference voltage and deactivation signals | Thilo Marx, Torsten Partsch, Patrick Heyne | 2001-09-04 |
| 6259652 | Synchronous integrated memory | Patrick Heyne, Torsten Partsch, Thilo Marx | 2001-07-10 |
| 6188642 | Integrated memory having column decoder for addressing corresponding bit line | Sabine Schoniger, Peter Schrogmeier, Stefan Dietrich, Thilo Marx | 2001-02-13 |
| 6144590 | Semiconductor memory having differential bit lines | Michael Markert, Musa Saglam, Sabine Schoniger, Peter Schrogmeier, Stefan Dietrich +1 more | 2000-11-07 |
| 6101141 | Integrated memory | Sabine Schoniger, Peter Schrogmeier, Stefan Dietrich, Thilo Marx | 2000-08-08 |