Issued Patents All Time
Showing 76–92 of 92 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6271593 | Method for fabricating conductive components in microelectronic devices and substrate structures therefor | John H. Givens | 2001-08-07 |
| 6265282 | Process for making an isolation structure | Randhir P. S. Thakur | 2001-07-24 |
| 6261899 | Semiconductor processing methods of forming integrated circuitry memory devices, methods of forming capacitor containers, methods of making electrical connection to circuit nodes and related integrated circuitry | John K. Zahurak | 2001-07-17 |
| 6238999 | Isolation region forming methods | David Dickerson, Charles H. Dennison, Kunal R. Parekh, Mark Fischer, John K. Zahurak | 2001-05-29 |
| 6175146 | Semiconductor processing methods of forming integrated circuitry memory devices, methods of forming capacitor containers, methods of making electrical connection to circuit nodes and related integrated circuitry | John K. Zahurak | 2001-01-16 |
| 6153532 | Methods and apparatuses for removing material from discrete areas on a semiconductor wafer | Daniel B. Dow | 2000-11-28 |
| 6113658 | Methods of forming batteries | — | 2000-09-05 |
| 6090655 | Increased interior volume for integrated memory cell | John K. Zahurak | 2000-07-18 |
| 6080655 | Method for fabricating conductive components in microelectronic devices and substrate structures thereof | John H. Givens | 2000-06-27 |
| 5998257 | Semiconductor processing methods of forming integrated circuitry memory devices, methods of forming capacitor containers, methods of making electrical connection to circuit nodes and related integrated circuitry | John K. Zahurak | 1999-12-07 |
| 5895274 | High-pressure anneal process for integrated circuits | Phillip G. Wald | 1999-04-20 |
| 5760434 | Increased interior volume for integrated memory cell | John K. Zahurak | 1998-06-02 |
| 5204275 | Method for fabricating compact bipolar transistor | — | 1993-04-20 |
| 5145571 | Gold interconnect with sidewall-spacers | Timothy M. Ebel | 1992-09-08 |
| 4746623 | Method of making bipolar semiconductor device with wall spacer | — | 1988-05-24 |
| 4736271 | Protection device utilizing one or more subsurface diodes and associated method of manufacture | William Daniel Mack | 1988-04-05 |
| 4381956 | Self-aligned buried channel fabrication process | — | 1983-05-03 |