Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12432925 | Integrated assemblies which include stacked memory decks, and methods of forming integrated assemblies | John D. Hopkins, Justin B. Dorhout, Nirup Bandaru, Damir Fazil, Nancy M. Lomeli +1 more | 2025-09-30 |
| 12288585 | Integrated circuitry comprising a memory array comprising strings of memory cells and methods used in forming a memory array comprising strings of memory cells | Alyssa N. Scarbrough, John D. Hopkins, Vinayak Shamanna, Justin D. Shepherdson | 2025-04-29 |
| 12150303 | Integrated assemblies having charge-trapping material arranged in vertically-spaced segments, and methods of forming integrated assemblies | Byeung Chul Kim, Francois H. Fabreguette, Richard J. Hill, Shyam Surthi | 2024-11-19 |
| 12144176 | Integrated assemblies having one or more modifying substances distributed within semiconductor material, and methods of forming integrated assemblies | John D. Hopkins, Jordan D. Greenlee | 2024-11-12 |
| 12010850 | Integrated assemblies which include stacked memory decks, and methods of forming integrated assemblies | John D. Hopkins, Justin B. Dorhout, Nirup Bandaru, Damir Fazil, Nancy M. Lomeli +1 more | 2024-06-11 |
| 11844202 | Integrated circuitry, a method used in forming integrated circuitry, and a method used in forming a memory array comprising strings of memory cells | — | 2023-12-12 |
| 11744072 | Integrated assemblies which include stacked memory decks | John D. Hopkins, Justin B. Dorhout, Nirup Bandaru, Damir Fazil, Nancy M. Lomeli +1 more | 2023-08-29 |
| 11672120 | Integrated assemblies having charge-trapping material arranged in vertically-spaced segments, and methods of forming integrated assemblies | Byeung Chui Kim, Francois H. Fabreguette, Richard J. Hill, Shyam Surthi | 2023-06-06 |
| 11538819 | Integrated circuitry, a method used in forming integrated circuitry, and a method used in forming a memory array comprising strings of memory cells | — | 2022-12-27 |
| 11107831 | Methods of forming integrated assemblies include stacked memory decks | John D. Hopkins, Justin B. Dorhout, Nirup Bandaru, Damir Fazil, Nancy M. Lomeli +1 more | 2021-08-31 |
| 11056505 | Integrated assemblies having one or more modifying substances distributed within semiconductor material, and methods of forming integrated assemblies | John D. Hopkins, Jordan D. Greenlee | 2021-07-06 |
| 11037956 | Integrated assemblies having charge-trapping material arranged in vertically-spaced segments, and methods of forming integrated assemblies | Byeung Chul Kim, Francois H. Fabreguette, Richard J. Hill, Shyam Surthi | 2021-06-15 |
| 10879259 | Methods and apparatuses having memory cells including a monolithic semiconductor channel | Jie Sun, Zhenyu Lu, Roger W. Lindsay, Brian Cleereman, John D. Hopkins +3 more | 2020-12-29 |
| 10790290 | 3D NAND with integral drain-end select gate (SGD) | David Daycock, John D. Hopkins, Guoxing Duan, Barbara L. Casey, Christopher J. Larsen +2 more | 2020-09-29 |
| 10777576 | Integrated assemblies having charge-trapping material arranged in vertically-spaced segments, and methods of forming integrated assemblies | Byeung Chul Kim, Francois H. Fabreguette, Richard J. Hill, Shyam Surthi | 2020-09-15 |
| 10134758 | Memory devices and systems having reduced bit line to drain select gate shorting and associated methods | Hongbin Zhu, Jun Zhao, Gordon A. Haller, Damir Fazil | 2018-11-20 |
| 10090317 | Methods and apparatuses having memory cells including a monolithic semiconductor channel | Jie Sun, Zhenyu Lu, Roger W. Lindsay, Brian Cleereman, John D. Hopkins +3 more | 2018-10-02 |
| 9741734 | Memory devices and systems having reduced bit line to drain select gate shorting and associated methods | Hongbin Zhu, Jun Zhao, Gordon A. Haller, Damir Fazil | 2017-08-22 |
| 9431410 | Methods and apparatuses having memory cells including a monolithic semiconductor channel | Jie Sun, Zhenyu Lu, Roger W. Lindsay, Brian Cleereman, John D. Hopkins +3 more | 2016-08-30 |