Issued Patents All Time
Showing 51–75 of 77 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5923682 | Error correction chip for memory applications | — | 1999-07-13 |
| 5917746 | Cell plate structure for a ferroelectric memory | — | 1999-06-29 |
| 5907861 | Destructive read protection using address blocking technique | — | 1999-05-25 |
| 5905672 | Ferroelectric memory using ferroelectric reference cells | — | 1999-05-18 |
| 5894444 | Cell plate referencing for dram sensing | — | 1999-04-13 |
| 5856939 | Low voltage dynamic memory | — | 1999-01-05 |
| 5847989 | Ferroelectric memory using non-remnant reference circuit | — | 1998-12-08 |
| 5844833 | DRAM with open digit lines and array edge reference sensing | Paul S. Zagar | 1998-12-01 |
| 5835441 | Column select latch for SDRAM | Jeffrey P. Wright | 1998-11-10 |
| 5818777 | Circuit for implementing and method for initiating a self-refresh mode | — | 1998-10-06 |
| 5811869 | Laser antifuse using gate capacitor | Manny K. F. Ma | 1998-09-22 |
| 5801996 | Data path for high speed high bandwidth DRAM | Paul S. Zagar | 1998-09-01 |
| 5751626 | Ferroelectric memory using ferroelectric reference cells | — | 1998-05-12 |
| 5726931 | DRAM with open digit lines and array edge reference sensing | Paul S. Zagar | 1998-03-10 |
| 5719813 | Cell plate referencing for DRAM sensing | — | 1998-02-17 |
| 5684749 | Single-ended sensing using global bit lines for dram | Stephen L. Casper | 1997-11-04 |
| 5682344 | Destructive read protection using address blocking technique | — | 1997-10-28 |
| 5680344 | Circuit and method of operating a ferrolectric memory in a DRAM mode | — | 1997-10-21 |
| 5677865 | Ferroelectric memory using reference charge circuit | — | 1997-10-14 |
| 5638318 | Ferroelectric memory using ferroelectric reference cells | — | 1997-06-10 |
| 5636170 | Low voltage dynamic memory | — | 1997-06-03 |
| 5625588 | Single-ended sensing using global bit lines for DRAM | Stephen L. Casper | 1997-04-29 |
| 5608668 | Dram wtih open digit lines and array edge reference sensing | Paul S. Zagar | 1997-03-04 |
| 5555429 | Multiport RAM based multiprocessor | Ward Parkinson, William K. Waller | 1996-09-10 |
| 5475631 | Multiport RAM based multiprocessor | Ward Parkinson, William K. Waller | 1995-12-12 |