Issued Patents All Time
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10811233 | Process chamber having tunable showerhead and tunable liner | Andrew Nguyen, Xue Yang Chang, Haitao Wang, Reza Sadjadi | 2020-10-20 |
| 7470628 | Etching methods | — | 2008-12-30 |
| 7319075 | Etchant with selectivity for doped silicon dioxide over undoped silicon dioxide and silicon nitride, processes which employ the etchant, and structures formed thereby | Li Li, Guy T. Blalock | 2008-01-15 |
| 7273566 | Gas compositions | — | 2007-09-25 |
| 7173339 | Semiconductor device having a substrate an undoped silicon oxide structure and an overlaying doped silicon oxide structure with a sidewall terminating at the undoped silicon oxide structure | Li Li, Guy T. Blalock | 2007-02-06 |
| 7094700 | Plasma etching methods and methods of forming memory devices comprising a chalcogenide comprising layer received operably proximate conductive electrodes | Li Li, Terry L. Gilton, John T. Moore, Karen Signorini | 2006-08-22 |
| 6989108 | Etchant gas composition | — | 2006-01-24 |
| 6967408 | Gate stack structure | — | 2005-11-22 |
| 6875371 | Etchant with selectivity for doped silicon dioxide over undoped silicon dioxide and silicon nitride, processes which employ the etchant, and structures formed thereby | Li Li, Guy T. Blalock | 2005-04-05 |
| 6849557 | Undoped silicon dioxide as etch stop for selective etch of doped silicon dioxide | — | 2005-02-01 |
| 6831019 | Plasma etching methods and methods of forming memory devices comprising a chalcogenide comprising layer received operably proximate conductive electrodes | Li Li, Terry L. Gilton, John T. Moore, Karen Signorini | 2004-12-14 |
| 6716766 | Process variation resistant self aligned contact etch | — | 2004-04-06 |
| 6551940 | Undoped silicon dioxide as etch mask for patterning of doped silicon dioxide | — | 2003-04-22 |
| 6537922 | Etchant with selectivity for doped silicon dioxide over undoped silicon dioxide and silicon nitride, processes which employ the etchant, and structures formed thereby | Li Li, Guy T. Blalock | 2003-03-25 |
| 6479864 | Semiconductor structure having a plurality of gate stacks | — | 2002-11-12 |
| 6458685 | Method of forming a self-aligned contact opening | Dave Pecora | 2002-10-01 |
| 6444586 | Method of etching doped silicon dioxide with selectivity to undoped silicon dioxide with a high density plasma etcher | — | 2002-09-03 |
| 6432833 | Method of forming a self aligned contact opening | — | 2002-08-13 |
| 6337285 | Self-aligned contact (SAC) etch with dual-chemistry process | — | 2002-01-08 |
| 6277758 | Method of etching doped silicon dioxide with selectivity to undoped silicon dioxide with a high density plasma etcher | — | 2001-08-21 |
| 6121671 | Semiconductor device having a substrate, an undoped silicon oxide structure, and an overlying doped silicon oxide structure with a side wall terminating at the undoped silicon oxide structure | Li Li, Guy T. Blalock | 2000-09-19 |
| 6117788 | Semiconductor etching methods | — | 2000-09-12 |
| 6117791 | Etchant with selectivity for doped silicon dioxide over undoped silicon dioxide and silicon nitride, processes which employ the etchant, and structures formed thereby | Li Li, Guy T. Blalock | 2000-09-12 |
| 5399900 | Isolation region in a group III-V semiconductor device and method of making the same | Samuel Chen, Shuit-Tong Lee | 1995-03-21 |