Issued Patents All Time
Showing 151–175 of 236 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6982892 | Apparatus and methods for a physical layout of simultaneously sub-accessible memory modules | Terry R. Lee | 2006-01-03 |
| 6947050 | Method of implementing an accelerated graphics/port for a multiple memory controller computer system | — | 2005-09-20 |
| 6934813 | System and method for caching data based on identity of requestor | — | 2005-08-23 |
| 6857055 | Programmable embedded DRAM current monitor | — | 2005-02-15 |
| 6853938 | Calibration of memory circuits | — | 2005-02-08 |
| 6845460 | Device and system for adjusting delay in a data path based on comparison of data from a latch and data from a register | Terry R. Lee, Kevin J. Ryan | 2005-01-18 |
| 6820181 | Method and system for controlling memory accesses to memory modules having a memory hub architecture | Terry R. Lee | 2004-11-16 |
| 6789169 | Embedded DRAM cache memory and method having reduced latency | — | 2004-09-07 |
| 6789155 | System and method for controlling multi-bank embedded DRAM | — | 2004-09-07 |
| 6789168 | Embedded DRAM cache | — | 2004-09-07 |
| 6754117 | System and method for self-testing and repair of memory modules | — | 2004-06-22 |
| 6745309 | Pipelined memory controller | — | 2004-06-01 |
| 6742074 | Bus to system memory delayed read processing | — | 2004-05-25 |
| 6741254 | Method of implementing an accelerated graphics port for a multiple memory controller computer system | — | 2004-05-25 |
| 6735709 | Method of timing calibration using slower data rate pattern | Terry R. Lee, Kevin J. Ryan | 2004-05-11 |
| 6717582 | Accelerated graphics port for a multiple memory controller computer system | — | 2004-04-06 |
| 6684304 | Method to access memory based on a programmable page limit | — | 2004-01-27 |
| 6636946 | System and method for caching data based on identity of requestor | — | 2003-10-21 |
| 6629222 | Apparatus for synchronizing strobe and data signals received from a RAM | — | 2003-09-30 |
| 6622228 | System and method of processing memory requests in a pipelined memory controller | — | 2003-09-16 |
| 6604180 | Pipelined memory controller | — | 2003-08-05 |
| 6513090 | Bidirectional data transfer during buffer flushing operations | — | 2003-01-28 |
| 6507897 | Memory paging control apparatus | — | 2003-01-14 |
| 6477623 | Method for providing graphics controller embedded in a core logic unit | — | 2002-11-05 |
| 6473817 | Method and apparatus for efficient bus arbitration | — | 2002-10-29 |