Issued Patents All Time
Showing 76–92 of 92 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6191976 | Flash memory margin mode enhancements | Michael C. Smayling, Giovanni Santin | 2001-02-20 |
| 6118706 | Flash memory block or sector clear operation | Michael C. Smayling, Giovanni Santin | 2000-09-12 |
| 5907171 | Method of making floating-gate memory-cell array with digital logic transistors | Giovani Santin, Michael C. Smayling, Misako A. Matsuoka, Satoru Fukawa | 1999-05-25 |
| 5874849 | Low voltage, high current pump for flash memory | Giovanni Santin, Pietro Piersimoni, Michael C. Smayling | 1999-02-23 |
| 5844839 | Programmable and convertible non-volatile memory array | Michael C. Smayling, Giovanni Santin, Pietro Piersimoni, Cristina Lattaro | 1998-12-01 |
| 5815026 | High efficiency, high voltage, low current charge pump | Giovanni Santin, Michael C. Smayling | 1998-09-29 |
| 5732021 | Programmable and convertible non-volatile memory array | Michael C. Smayling, Giovanni Santin, Pietro Piersimoni, Cristina Lattaro | 1998-03-24 |
| 5717634 | Programmable and convertible non-volatile memory array | Michael C. Smayling, Giovanni Santin, Pietro Piersimoni | 1998-02-10 |
| 5715195 | "Programmable memory verify ""0"" and verify ""1"" circuit and method" | Michael C. Smayling, Giovanni Santin, Pietro Piersimoni, Cristina Lattaro | 1998-02-03 |
| 5704014 | Voltage-current conversion circuit employing MOS transistor cells as synapses of neural network | Eros Pasero | 1997-12-30 |
| 5703807 | EEPROM with enhanced reliability by selectable V.sub.PP for write and erase | Michael C. Smayling, Giovanni Santin | 1997-12-30 |
| 5563959 | Character recognition | Girolamo Gallo | 1996-10-08 |
| 5557569 | Low voltage flash EEPROM C-cell using fowler-nordheim tunneling | Michael C. Smayling, Iano D'Arrigo, Giovanni Santin, Georges Falessi, Mousumi Bhat | 1996-09-17 |
| 5457771 | Integrated circuit with non-volatile, variable resistor, for use in neuronic network | Giuliano Imondi, Eros Pasero, Giulio Porrovecchio, Giuseppe Savarese | 1995-10-10 |
| 5319604 | Circuitry and method for selectively switching negative voltages in CMOS integrated circuits | Giuliano Imondi, Giulio Porrovecchio, Giuseppe Savarese | 1994-06-07 |
| 5299286 | Data processing system for implementing architecture of neural network subject to learning process | Giuliano Imondi, Giulio Porrovecchio, Giuseppe Savarese, Luciano Talamonti | 1994-03-29 |
| 5274743 | Learning system for a neural net of a suitable architecture, physically insertable in the learning process | Giuliano Imondi, Giulio Porrovecchio, Giuseppe Savarese | 1993-12-28 |