Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5907171 | Method of making floating-gate memory-cell array with digital logic transistors | Giulio Marotta, Michael C. Smayling, Misako A. Matsuoka, Satoru Fukawa | 1999-05-25 |
| 5122985 | Circuit and method for erasing EEPROM memory arrays to prevent over-erased cells | — | 1992-06-16 |