Issued Patents All Time
Showing 26–50 of 159 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11705185 | Apparatus for differential memory cells | — | 2023-07-18 |
| 11699999 | Output buffer having supply filters | — | 2023-07-11 |
| 11688448 | Digit line management for a memory array | Xinwei Guo | 2023-06-27 |
| 11670353 | Current separation for memory sensing | — | 2023-06-06 |
| 11659705 | Thin film transistor deck selection in a memory device | — | 2023-05-23 |
| 11616068 | Deck selection layouts in a memory device | — | 2023-03-28 |
| 11605412 | Wear leveling for random access and ferroelectric memory | Richard E. Fackenthal, Duane R. Mills | 2023-03-14 |
| 11557330 | Deck-level shuntung in a memory device | — | 2023-01-17 |
| 11545206 | Differential amplifier sensing schemes for non-switching state compensation in a memory device | Xinwei Guo | 2023-01-03 |
| 11545205 | Apparatuses, systems, and methods for ferroelectric memory cell operations | — | 2023-01-03 |
| 11502091 | Thin film transistor deck selection in a memory device | — | 2022-11-15 |
| 11501816 | Low voltage ferroelectric memory cell sensing | — | 2022-11-15 |
| 11482268 | Leakage compensation for memory arrays | — | 2022-10-25 |
| 11417380 | Dual mode ferroelectric memory cell operation | — | 2022-08-16 |
| 11393822 | Thin film transistor deck selection in a memory device | — | 2022-07-19 |
| 11380696 | Plate node configurations and operations for a memory array | — | 2022-07-05 |
| 11348630 | Self reference for ferroelectric memory | — | 2022-05-31 |
| 11335644 | Apparatuses and methods for shielded memory architecture | Ferdinando Bedeschi, Umberto Di Vincenzo | 2022-05-17 |
| 11322196 | Sense amplifier with lower offset and increased speed | Xinwei Guo | 2022-05-03 |
| 11322191 | Charge extraction from ferroelectric memory cell | — | 2022-05-03 |
| 11315617 | Access line management for an array of memory cells | — | 2022-04-26 |
| 11282560 | Temperature-based access timing for a memory device | Victor Wong, Sihong Kim, Hiroshi Akamatsu, John D. Porter | 2022-03-22 |
| 11276448 | Memory array with multiplexed select lines and two transistor memory cells | — | 2022-03-15 |
| 11245398 | Output buffer having supply filters | — | 2022-02-08 |
| 11244733 | Mitigating disturbances of memory cells | Mark Fischer, Adam Johnson | 2022-02-08 |