Issued Patents All Time
Showing 76–100 of 105 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10068664 | Column repair in memory | Guy S. Perry, Harish N. Venkata, Glen E. Hush | 2018-09-04 |
| 10013197 | Shift skip | Gary L. Howe, Harish N. Venkata | 2018-07-03 |
| 9972367 | Shifting data in sensing circuitry | Harish N. Venkata, Guy S. Perry | 2018-05-15 |
| 9966116 | Apparatuses and methods for storing a data value in a sensing circuitry element | Harish N. Venkata, Guy S. Perry | 2018-05-08 |
| 9805772 | Apparatuses and methods to selectively perform logical operations | Harish N. Venkata | 2017-10-31 |
| 9767864 | Apparatuses and methods for storing a data value in a sensing circuitry element | Harish N. Venkata, Guy S. Perry | 2017-09-19 |
| 9130793 | Constant delay zero standby differential logic receiver and method | — | 2015-09-08 |
| 7898294 | Pre-driver logic | William C. Waldrop | 2011-03-01 |
| 7848457 | Constant delay zero standby differential logic receiver and method | — | 2010-12-07 |
| 7675324 | Pre-driver logic | William C. Waldrop | 2010-03-09 |
| 7512019 | High speed digital signal input buffer and method using pulsed positive feedback | — | 2009-03-31 |
| 7133992 | Burst counter controller and method in a memory device operable in a 2-bit prefetch mode | Steven Rhejohn Barlin SO | 2006-11-07 |
| 7003643 | Burst counter controller and method in a memory device operable in a 2-bit prefetch mode | Steven Rhejohn Barlin SO | 2006-02-21 |
| 6975149 | Method and circuit for adjusting the timing of output data based on an operational mode of output drivers | Vladimir Mikhalev, Aaron Schoenfeld, William C. Waldrop | 2005-12-13 |
| 6973006 | Predecode column architecture and method | — | 2005-12-06 |
| 6920187 | Constant delay zero standby differential logic receiver and method | — | 2005-07-19 |
| 6819151 | Method and circuit for adjusting the timing of output data based on an operational mode of output drivers | Vladimir Mikhalev, Aaron Schoenfeld, William C. Waldrop | 2004-11-16 |
| 6788597 | Memory device having programmable column segmentation to increase flexibility in bit repair | Brian J. Ladner | 2004-09-07 |
| 6771557 | Predecode column architecture and method | — | 2004-08-03 |
| 6693472 | Method and circuit for adjusting the timing of output data based on an operational mode of output drivers | Vladimir Mikhalev, Aaron Schoenfeld, William C. Waldrop | 2004-02-17 |
| 6628565 | Predecode column architecture and method | — | 2003-09-30 |
| 6605969 | Method and circuit for adjusting the timing of ouput data based on an operational mode of output drivers | Vladimir Mikhalev, Aaron Schoenfeld, William C. Waldrop | 2003-08-12 |
| 6552937 | Memory device having programmable column segmentation to increase flexibility in bit repair | Brian J. Ladner | 2003-04-22 |
| 6381183 | Column redundancy for prefetch | — | 2002-04-30 |
| 6329867 | Clock input buffer with noise suppression | William C. Waldrop, Jason M. Brown | 2001-12-11 |