Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12084708 | Acoustic wave resonator with active shunt capacitance cancellation and systems thereof | Darren W. Branch, DeAnna Marie Campbell, Kurt O. Wessendorf | 2024-09-10 |
| 11366116 | Real time autonomous surveillance of pathogens | Robert Meagher, Ronald F. Renzi, Cameron Scott Ball, Aashish Priye, Jonathan HELM +1 more | 2022-06-21 |
| 11171604 | Active shunt capacitance cancelling oscillator for resonators | Darren W. Branch, Kurt O. Wessendorf, DeAnna Marie Campbell | 2021-11-09 |
| 10126299 | Amplification of biological targets via on-chip culture for biosensing | Jason C. Harper, Thayne L. Edwards, Melissa Finley, William Arndt | 2018-11-13 |
| 9857370 | Amplification of biological targets via on-chip culture for biosensing | Jason C. Harper, Thayne L. Edwards, Melissa Finley, William Arndt | 2018-01-02 |
| 6921318 | Semiconductor die de-processing using a die holder and chemical mechanical polishing | Scott E. Moore | 2005-07-26 |
| 6784043 | Methods for forming aligned fuses disposed in an integrated circuit | Mark L. Hadzor, Lucien J. Bissey | 2004-08-31 |
| 6642084 | Methods for forming aligned fuses disposed in an integrated circuit | Mark L. Hadzor, Lucien J. Bissey | 2003-11-04 |
| 6522595 | Methods for forming and programming aligned fuses disposed in an integrated circuit | Mark L. Hadzor, Lucien J. Bissey | 2003-02-18 |
| 6248001 | Semiconductor die de-processing using a die holder and chemical mechanical polishing | Scott E. Moore | 2001-06-19 |
| 6235622 | Method and apparatus for isolating a conductive region from a substrate during manufacture of an integrated circuit and connected to the substrate after manufacture | Lucien J. Bissey, Gordon D. Roberts | 2001-05-22 |
| 6172929 | Integrated circuit having aligned fuses and methods for forming and programming the fuses | Mark L. Hadzor, Lucien J. Bissey | 2001-01-09 |
| 6137119 | Apparatus for isolating a conductive region from a substrate during manufacture of an integrated circuit and connecting the conductive region to the substrate after manufacture | Lucien J. Bissey, Gordon D. Roberts | 2000-10-24 |