Issued Patents All Time
Showing 26–39 of 39 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9164894 | Staggered programming for resistive memories | Gerald Barkley, Sunil Shetty | 2015-10-20 |
| 9038044 | Code patching for non-volatile memory | Massimiliano Mollichelli, Stefan Frederik Schippers | 2015-05-19 |
| 8639903 | Staggered programming for resistive memories | Gerald Barkley, Sunil Shetty | 2014-01-28 |
| 8607210 | Code patching for non-volatile memory | Massimiliano Mollichelli, Stefan Frederik Schippers | 2013-12-10 |
| 8539141 | Optimized flash memory access method and device | Christophe Vincent Antoine Laurent, Stefan Frederik Schippers, Graziano Mirichigni | 2013-09-17 |
| 8284623 | Electronic device comprising non volatile memory cells and corresponding programming method | Pierguido Garofalo, Graziano Mirichigni | 2012-10-09 |
| 8015345 | Optimized flash memory access method and device | Christophe Vincent Antoine Laurent, Stefan Frederik Schippers, Graziano Mirichigni | 2011-09-06 |
| 7940590 | Electronic device comprising non volatile memory cells and corresponding programming method | Pierguido Garofalo, Graziano Mirichigni | 2011-05-10 |
| 7688633 | Method for programming a memory device suitable to minimize floating gate coupling and memory device | Stefan Frederik Schippers, Marco Onorato | 2010-03-30 |
| 7649791 | Non volatile memory device architecture and corresponding programming method | Pierguido Garofalo, Graziano Mirichigni | 2010-01-19 |
| 7515464 | Synchronization of operations in distinct memory partitions | Daniele Vimercati, Efrem Bolandrina | 2009-04-07 |
| 7512032 | Electronic device comprising non volatile memory cells with optimized programming and corresponding programming method | Pierguido Garofalo, Graziano Mirichigni | 2009-03-31 |
| 7196943 | Memory device | Graziano Mirichigni | 2007-03-27 |
| 7154803 | Redundancy scheme for a memory integrated circuit | Daniele Balluchi, Corrado Villa | 2006-12-26 |