| 8073092 |
Automatic synchronization of an internal oscillator to an external frequency reference |
— |
2011-12-06 |
| 7761689 |
Programming a digital processor with a single connection |
— |
2010-07-20 |
| 7487331 |
Programming a digital processor with a single connection |
— |
2009-02-03 |
| 7375555 |
Five volt tolerant integrated circuit signal pad with three volt assist |
Guoli Wang, Russell E. Cooper |
2008-05-20 |
| 6944739 |
Register bank |
James R. Bartling, Randy Yach |
2005-09-13 |
| 6563740 |
Electronic circuit and method for testing and refreshing non-volatile memory |
Mitchel Obolsky, Joseph W. Triece |
2003-05-13 |
| 6349058 |
Electronic circuit and method for storing configuration and calibration information in a non-volatile memory array |
— |
2002-02-19 |
| 6175267 |
Current compensating bias generator and method therefor |
John Bree, Timothy Phoenix |
2001-01-16 |
| 6060955 |
Voltage compensated oscillator and method therefor |
— |
2000-05-09 |
| 5991196 |
Reprogrammable memory device with variable page size |
Timothy Phoenix, Brian Boles, Henry PENA, Gordon E. Luke |
1999-11-23 |
| 5798915 |
Progressive start-up charge pump and method therefor |
— |
1998-08-25 |
| 5742155 |
Zero-current start-up circuit |
David M. Susak |
1998-04-21 |
| 5664213 |
Input/output (I/O) holdoff mechanism for use in a system where I/O device inputs are fed through a latency introducing bus |
James Steele, Gary D. Hicok, David R. Evoy, Gary Walker, Lonnie C. Goff |
1997-09-02 |
| 5634069 |
Encoding assertion and de-assertion of interrupt requests and DMA requests in a serial bus I/O system |
Gary D. Hicok, David R. Evoy, Gary Walker, Lonnie C. Goff, Bruce E. Cairns |
1997-05-27 |
| 5596288 |
Status register with asynchronous read and reset and method for providing same |
Laura E. Simmons |
1997-01-21 |
| 5493242 |
Status register with asynchronous read and reset and method for providing same |
Laura E. Simmons |
1996-02-20 |
| 5475854 |
Serial bus I/O system and method for serializing interrupt requests and DMA requests in a computer system |
Franklyn H. Story, David R. Evoy, W. Henry Potts, Brian Fall, Hrushikesh Nalubola |
1995-12-12 |
| 5465339 |
Decoupled refresh on local and system busses in a PC/at or similar microprocessor environment |
Ned D. Garinger, Jeffery M. Michelsen |
1995-11-07 |
| 5410550 |
Asynchronous latch circuit and register |
Laura E. Simmons, Marty L. Long |
1995-04-25 |
| 5404460 |
Method for configuring multiple identical serial I/O devices to unique addresses through a serial bus |
David R. Evoy |
1995-04-04 |
| 5278956 |
Variable sized FIFO memory and programmable trigger level therefor for use in a UART or the like |
Marty L. Long |
1994-01-11 |
| 5233617 |
Asynchronous latch circuit and register |
Laura E. Simmons, Marty L. Long |
1993-08-03 |
| 5065042 |
Self-configuring clock interface circuit |
Richard W. Ulmer |
1991-11-12 |
| 5038059 |
Status register with asynchronous set and reset signals |
Thomas J. Ebzery, Timothy John Powers |
1991-08-06 |