Issued Patents All Time
Showing 25 most recent of 31 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8889518 | LDMOS transistor with asymmetric spacer as gate | Paul M. Moore | 2014-11-18 |
| 8525257 | LDMOS transistor with asymmetric spacer as gate | Paul M. Moore | 2013-09-03 |
| 8227860 | System for vertical DMOS with slots | John Durbin Husher | 2012-07-24 |
| 7960754 | Diode having high breakdown voltage and low on-resistance | — | 2011-06-14 |
| 7843019 | Seal ring for mixed circuitry semiconductor devices | Shekar Mallikarjunaswamy | 2010-11-30 |
| 7586132 | Power FET with low on-resistance using merged metal layers | Richard Dolan | 2009-09-08 |
| 7573098 | Transistors fabricated using a reduced cost CMOS process | — | 2009-08-11 |
| 7501693 | LDO regulator with ground connection through package bottom | George Chu | 2009-03-10 |
| 7485549 | Seal ring for mixed circuitry semiconductor devices | Shekar Mallikarjunaswamy | 2009-02-03 |
| 7315052 | Power FET with embedded body pickup | — | 2008-01-01 |
| 7211893 | Integrating chip scale packaging metallization into integrated circuit die structures | Robert Rumsey | 2007-05-01 |
| 7195952 | Schottky diode device with aluminum pickup of backside cathode | Chuck Vinn | 2007-03-27 |
| 7145211 | Seal ring for mixed circuitry semiconductor devices | Shekar Mallikarjunaswamy | 2006-12-05 |
| 7087973 | Ballast resistors for transistor devices | Shekar Mallikarjunaswamy, Charles Vinn | 2006-08-08 |
| 6917105 | Integrating chip scale packaging metallization into integrated circuit die structures | — | 2005-07-12 |
| 6900538 | Integrating chip scale packaging metallization into integrated circuit die structures | Robert Rumsey | 2005-05-31 |
| 6711046 | Programmable optical array | — | 2004-03-23 |
| 6621138 | Zener-like trim device in polysilicon | — | 2003-09-16 |
| 6395591 | Selective substrate implant process for decoupling analog and digital grounds | Stephen McCormack, Robert S. Wrathall, Carlos A. Laber | 2002-05-28 |
| 5589702 | High value gate leakage resistor | — | 1996-12-31 |
| 5517046 | High voltage lateral DMOS device with enhanced drift region | Michael Hsing, Martin E. Garnett, James C. Moyer, Helmuth R. Litfin | 1996-05-14 |
| 5447876 | Method of making a diamond shaped gate mesh for cellular MOS transistor array | James C. Moyer, Helmuth R. Litfin | 1995-09-05 |
| 5439764 | Mask having multiple patterns | Lawrence R. Sample, Hiu Ip, Marty Garnett, Helmuth R. Litfin | 1995-08-08 |
| 5439841 | High value gate leakage resistor | — | 1995-08-08 |
| 5355008 | Diamond shaped gate mesh for cellular MOS transistor array | James C. Moyer, Helmuth R. Litfin | 1994-10-11 |