MC

Michael Curtis

MN Metaswitch Networks: 10 patents #11 of 129Top 9%
HG HGST: 2 patents #738 of 1,677Top 45%
IBM: 2 patents #32,839 of 70,183Top 50%
RT Renesas Technology: 1 patents #1,991 of 3,337Top 60%
TI Tigera: 1 patents #2 of 8Top 25%
Overall (All Time): #318,137 of 4,157,543Top 8%
15
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
10999101 Flow synchronization Robert Brockbank, Alex Pollitt, Shaun Crampton 2021-05-04
10439936 Packet data routing Simon Wingrove, Shaun Crampton, Alex Pollitt 2019-10-08
10063456 Data processing Casey Davenport, Simon Wingrove, Alex Pollitt, Shaun Crampton, Steve Balls +1 more 2018-08-28
10003474 Flow synchronization Robert Brockbank, Alex Pollitt, Shaun Crampton 2018-06-19
9985882 Packet data routing Simon Wingrove, Shaun Crampton, Alex Pollitt 2018-05-29
9923799 Data processing Casey Davenport, Simon Wingrove, Alex Pollitt, Shaun Crampton, Steve Balls +1 more 2018-03-20
9871717 Data processing Casey Davenport, Simon Wingrove, Alex Pollitt, Shaun Crampton, Steve Balls +1 more 2018-01-16
9813302 Data center networks Christopher David Liljenstolpe, Alex Pollitt, Matthew Gerard Horatio Dupre, Edward Peter Harrison 2017-11-07
9742660 Validating a routing function Christopher David Liljenstolpe, Simon Wingrove, Tom Denham, Paul Tiplady, Alex Pollitt 2017-08-22
9722874 Inference-based network route control Christopher David Liljenstolpe 2017-08-01
9559971 Device configuration Alex Pollitt, Simon Wingrove, Shaun Crampton 2017-01-31
7271969 Apparatus for providing high speed, linear-phase interpolation Eric Carpenter, Raymond A. Richetta, Doug Spannring 2007-09-18
7227709 System and method for providing head amplitude characterization Vicki Pipal, Raymond A. Richetta, Koji Nasu 2007-06-05
6925086 Packet memory system Adalberto G. Yanes 2005-08-02
6438062 Multiple memory bank command for synchronous DRAMs William Paul Hovis, Steven W. Tomashot 2002-08-20