RT

Ramesh C. Tekumalla

LS Lsi: 20 patents #30 of 1,740Top 2%
AP Avago Technologies General Ip (Singapore) Pte.: 2 patents #524 of 2,004Top 30%
Oracle: 2 patents #5,522 of 14,854Top 40%
Overall (All Time): #174,181 of 4,157,543Top 5%
24
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
9348593 Instruction address encoding and decoding based on program construct groups Prakash Krishnamoorthy, Parag Madhani 2016-05-24
9251916 Integrated clock architecture for improved testing Vijay Sharma 2016-02-02
8924801 At-speed scan testing of interface functional logic of an embedded memory or other circuit core Prakash Krishnamoorthy 2014-12-30
8904255 Integrated circuit having clock gating circuitry responsive to scan shift control signal Prakash Krishnamoorthy 2014-12-02
8898527 At-speed scan testing of clock divider logic in a clock module of an integrated circuit Priyesh Kumar, Komal Shah 2014-11-25
8850280 Scan enable timing control for testing of scan cells — 2014-09-30
8826087 Scan circuitry for testing input and output functional paths of an integrated circuit Vijay Sharma 2014-09-02
8819508 Scan test circuitry configured to prevent violation of multiplexer select signal constraints during scan testing Narendra B. Devta Prasanna 2014-08-26
8812921 Dynamic clock domain bypass for scan chains Priyesh Kumar 2014-08-19
8799731 Clock control for reducing timing exceptions in scan testing of an integrated circuit Prakash Krishnamoorthy, Vijay Sharma 2014-08-05
8793546 Integrated circuit comprising scan test circuitry with parallel reordered scan chains Prakash Krishnamoorthy, Parag Madhani 2014-07-29
8788896 Scan chain lockup latch with data input control responsive to scan enable signal — 2014-07-22
8751884 Scan test circuitry with selectable transition launch mode — 2014-06-10
8738978 Efficient wrapper cell design for scan testing of integrated Partho Tapan Chaudhuri, Priyesh Kumar, Komal Shah 2014-05-27
8726108 Scan test circuitry configured for bypassing selected segments of a multi-segment scan chain Prakash Krishnamoorthy, Niranjan Anant Pol, Vineet Sreekumar 2014-05-13
8711013 Coding circuitry for difference-based data transformation Prakash Krishnamoorthy, Parag Madhani 2014-04-29
8700962 Scan test circuitry configured to prevent capture of potentially non-deterministic values Prakash Krishnamoorthy 2014-04-15
8677200 Integrated circuit with transition control circuitry for limiting scan test signal transitions during scan testing Prakash Krishnamoorthy 2014-03-18
8671320 Integrated circuit comprising scan test circuitry with controllable number of capture pulses — 2014-03-11
8645778 Scan test circuitry with delay defect bypass functionality Prakash Krishnamoorthy 2014-02-04
8615693 Scan test circuitry comprising scan cells with multiple scan inputs — 2013-12-24
8566658 Low-power and area-efficient scan cell for integrated circuit testing Priyesh Kumar, Prakash Krishnamoorthy, Parag Madhani 2013-10-22
6886145 Reducing verification time for integrated circuit design including scan circuits Scott A. Davidson 2005-04-26
6745374 Algorithms for determining path coverages and activity Scott A. Davidson 2004-06-01