Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8046726 | Waiver mechanism for physical verification of system designs | Viswanathan Lakshmanan, Lisa M. Miller | 2011-10-25 |
| 7302654 | Method of automating place and route corrections for an integrated circuit design from physical design validation | Viswanathan Lakshmanan, Richard Blinne | 2007-11-27 |
| 7231626 | Method of implementing an engineering change order in an integrated circuit design by windows | Jason Hoff, Viswanathan Lakshmanan, Daniel W. Prevedel, Richard Blinne, Johathan P. Kuppinger | 2007-06-12 |
| 6775811 | Chip design method for designing integrated circuit chips with embedded memories | Viswanathan Lakshmanan, Tom O'Brien, David A. Morgan | 2004-08-10 |