Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6681373 | Method and apparatus for dynamic buffer and inverter tree optimization | Andrej A. Zolotykh, Elyar E. Gasanov, Alexander S. Podkolzin | 2004-01-20 |
| 6637011 | Method and apparatus for quick search for identities applicable to specified formula | Andrej A. Zolotykh, Elyar E. Gasanov, Alexander S. Podkolzin | 2003-10-21 |
| 6615401 | Blocked net buffer insertion | Elyar E. Gasanov, Andrey Nikitin | 2003-09-02 |
| 6564361 | Method and apparatus for timing driven resynthesis | Andrej A. Zolotykh, Elyar E. Gasanov, Alexander S. Podkolzin | 2003-05-13 |
| 6543032 | Method and apparatus for local resynthesis of logic trees with multiple cost functions | Andrej A. Zolotykh, Elyar E. Gasanov, Alexander S. Podkolzin | 2003-04-01 |
| 6532582 | Method and apparatus for optimal critical netlist area selection | Andrej A. Zolotykh, Elyar E. Gasanov, Alexander S. Podkolzin | 2003-03-11 |