PR

Parthasarathy Rajagopalan

Lsi Logic: 1 patents #1,146 of 1,957Top 60%
📍 Milpitas, CA: #2,135 of 3,192 inventorsTop 70%
🗺 California: #247,236 of 386,348 inventorsTop 65%
Overall (All Time): #3,352,736 of 4,157,543Top 85%
1
Patents All Time

Issued Patents All Time

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
7354790 Method and apparatus for avoiding dicing chip-outs in integrated circuit die Zafer Kutlu, Emery Sugasawara, Charles E. VONDERACH, Dilip Vijay, Yogendra Ranade +2 more 2008-04-08