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Ken Rafftesaeth

Lsi Logic: 1 patents #1,146 of 1,957Top 60%
📍 San Jose, CA: #22,480 of 32,062 inventorsTop 75%
🗺 California: #247,236 of 386,348 inventorsTop 65%
Overall (All Time): #3,516,045 of 4,157,543Top 85%
1
Patents All Time

Issued Patents All Time

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
6586814 Etch resistant shallow trench isolation in a semiconductor wafer Rajiv Patel, David Chan, Arvind Kamath, Venkatesh P. Gopinath 2003-07-01