Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6852243 | Confinement device for use in dry etching of substrate surface and method of dry etching a wafer surface | Gregory A. Johnson, Kunal N. Taravade | 2005-02-08 |
| 6288454 | Semiconductor wafer having a layer-to-layer alignment mark and method for fabricating the same | Derryl D. J. Allman, Curtis C. Hainds, Brian R. Lee | 2001-09-11 |
| 6261406 | Confinement device for use in dry etching of substrate surface and method of dry etching a wafer surface | Gregory A. Johnson, Kunal N. Taravade | 2001-07-17 |
| 6211051 | Reduction of plasma damage at contact etch in MOS integrated circuits | Kang-Jay Hsia | 2001-04-03 |
| 6136662 | Semiconductor wafer having a layer-to-layer alignment mark and method for fabricating the same | Derryl D. J. Allman, Curtis C. Hainds, Brian R. Lee | 2000-10-24 |
| 5620573 | Reduced stress tungsten deposition | Ratnaji R. Kola, Gabriel L. Miller, Henry I. Smith, Eric R. Wagner | 1997-04-15 |