Issued Patents All Time
Showing 1–25 of 28 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12197581 | Key provisioning systems and methods for programmable logic devices | Srirama Chandra, Sreepada Hegade, Joel Coplen, Wei Han, Yu-Chen Sun | 2025-01-14 |
| 12189777 | Secure boot systems and methods for programmable logic devices | Srirama Chandra, Sreepada Hegade, Joel Coplen, Wei Han, Yu-Chen Sun | 2025-01-07 |
| 12093701 | Fast boot systems and methods for programmable logic devices | John Gordon Hands, Wei Han, Mark Everhard | 2024-09-17 |
| 11971992 | Failure characterization systems and methods for erasing and debugging programmable logic devices | Srirama Chandra, Sreepada Hegade, Joel Coplen, Wei Han, Yu-Chen Sun | 2024-04-30 |
| 11914716 | Asset management systems and methods for programmable logic devices | Srirama Chandra, Sreepada Hegade, Joel Coplen, Wei Han, Yu-Chen Sun | 2024-02-27 |
| 11847471 | Fast boot systems and methods for programmable logic devices | Gordon Hands, Satwant Singh, Wei Han, Ravindar M. Lall, Joel Coplen +2 more | 2023-12-19 |
| 11681536 | Fast boot systems and methods for programmable logic devices | John Gordon Hands, Wei Han, Mark Everhard | 2023-06-20 |
| 11132207 | Fast boot systems and methods for programmable logic devices | Gordon Hands, Satwant Singh, Wei Han, Ravindar Lail, Joel Copien +2 more | 2021-09-28 |
| 8912933 | Serializer with multiple stages | Ling Wang, John Schadt | 2014-12-16 |
| 8686773 | In-system margin measurement circuit | Chien-Kuang Chen | 2014-04-01 |
| 8461894 | Low-power configurable delay element | Zheng Chen, Chien-Kuang Chen, John Schadt | 2013-06-11 |
| 8274412 | Serializer with odd gearing ratio | Ling Wang, John Schadt | 2012-09-25 |
| 8248136 | Low-power, glitch-less, configurable delay element | Zheng Chen, Chien-Kuang Chen, John Schadt | 2012-08-21 |
| 7863931 | Flexible delay cell architecture | Zhen Chen, William B. Andrews, Barry Britton | 2011-01-04 |
| 7808855 | Distributed front-end FIFO for source-synchronous interfaces with non-continuous clocks | Harold Scholz, Larry R. Fenstermaker, John Schadt | 2010-10-05 |
| 7620839 | Jitter tolerant delay-locked loop circuit | Zheng Chen, Phillip Johnson | 2009-11-17 |
| 7573770 | Distributed front-end FIFO for source-synchronized interfaces with non-continuous clocks | Harold Scholz, Larry R. Fenstermaker, John Schadt | 2009-08-11 |
| 7495495 | Digital I/O timing control | Harold Scholz | 2009-02-24 |
| 7109754 | Synchronization of programmable multiplexers and demultiplexers | — | 2006-09-19 |
| 7109756 | Synchronization of programmable multiplexers and demultiplexers | — | 2006-09-19 |
| 7091763 | Clock generation | Phillip Johnson, William B. Andrews, Gary P. Powell | 2006-08-15 |
| 7009433 | Digitally controlled delay cells | William B. Andrews, Phillip Johnson, Hal Scholz, Zheng Chen, John Schadt | 2006-03-07 |
| 7009423 | Programmable I/O interfaces for FPGAs and other PLDs | William B. Andrews, Harold Scholz | 2006-03-07 |
| 6975137 | Programmable logic devices with integrated standard-cell logic blocks | John Schadt, William B. Andrews, Zheng Chen, Anthony K. Myers, David A. Rhein +3 more | 2005-12-13 |
| 6952115 | Programmable I/O interfaces for FPGAs and other PLDs | William B. Andrews, Harold Scholz | 2005-10-04 |