TO

Teruo Ono

KU Kyoto University: 3 patents #177 of 1,688Top 15%
UE University Of Electro-Communications: 2 patents #20 of 199Top 15%
NE Nec: 2 patents #5,510 of 14,502Top 40%
Samsung: 1 patents #49,284 of 75,807Top 70%
OU Osaka University: 1 patents #681 of 1,984Top 35%
ND Nec Compound Semiconductor Devices: 1 patents #19 of 87Top 25%
TU Tokyo Metropolitan University: 1 patents #51 of 128Top 40%
Overall (All Time): #676,911 of 4,157,543Top 20%
7
Patents All Time

Issued Patents All Time

Showing 1–7 of 7 patents

Patent #TitleCo-InventorsDate
12236989 Layer structure for magnetic memory element, magnetic memory element, magnetic memory device, and method for storing data in magnetic memory element 2025-02-25
11302373 Race track magnetic memory device and writing method thereof Yoshiaki Sonobe, Syuta Honda 2022-04-12
8345473 Ferromagnetic thin wire element Yoshinobu Nakatani 2013-01-01
7952915 Core-rotating element of ferromagnetic dot and information memory element using the core of ferromagnetic dot Shinya Kasai, Kensuke Kobayashi, Yoshinobu Nakatani, Hiroshi Kohno, Gen Tatara 2011-05-31
6555763 Multilayered circuit board for semiconductor chip module, and method of manufacturing the same Koki Hirasawa 2003-04-29
6351026 Multilayered wiring structure and method of manufacturing the same Koki Hirasawa 2002-02-26
6274404 Multilayered wiring structure and method of manufacturing the same Koki Hirasawa 2001-08-14