Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6440641 | Deposited thin film build-up layer dimensions as a method of relieving stress in high density interconnect printed wiring board substrates | Jan Strandberg | 2002-08-27 |
| 6262579 | Method and structure for detecting open vias in high density interconnect substrates | David Chazan | 2001-07-17 |
| 6245445 | Rough electrical contact surface | — | 2001-06-12 |
| 6165892 | Method of planarizing thin film layers deposited over a common circuit base | David Chazan, Ted Chen, Todd Kaplan, Michael P. Skinner, Jan Strandberg | 2000-12-26 |
| 5876580 | Rough electrical contact surface | — | 1999-03-02 |
| 5681441 | Method for electroplating a substrate containing an electroplateable pattern | Leo G. Svendsen, Clifford James Walker | 1997-10-28 |