Issued Patents All Time
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11989554 | Processing pipeline with zero loop overhead | Kameran Azadet, Joseph Williams | 2024-05-21 |
| 11074213 | Apparatuses, methods, and systems for vector processor architecture having an array of identical circuit blocks | Joseph Williams, Jay O'Neill, Harm Peters, Eugene Scuteri | 2021-07-27 |
| 9928066 | Instruction and logic for encoded word instruction compression | — | 2018-03-27 |
| 9852092 | System and method for memory access | — | 2017-12-26 |
| 9201657 | Lower power assembler | — | 2015-12-01 |
| 8954941 | Method and apparatus and record carrier | Hendrik Tjeerd Joannes Zwartenkot, Alexander Augusteijn, Yuanging Guo, Jürgen Von Oerthel, Erwan Yann Maurice Le Thenaff | 2015-02-10 |
| 8838945 | Data processing circuit with a plurality of instruction modes for processing time-stationary encoded instructions, and method of operating/scheduling such data circuit | Hendrik Tjeerd Joannes Zwartenkot | 2014-09-16 |
| 8433553 | Method and apparatus for designing a processor | Alexander Augusteijn | 2013-04-30 |
| 8145888 | Data processing circuit with a plurality of instruction modes, method of operating such a data circuit and scheduling method for such a data circuit | Hendrik Tjeerd Joannes Zwartenkot | 2012-03-27 |
| 8095780 | Register systems and methods for a multi-issue processor | — | 2012-01-10 |
| 7937572 | Run-time selection of feed-back connections in a multiple-instruction word processor | Alexander Augusteijn | 2011-05-03 |
| 7873813 | Variable length VLIW instruction with instruction fetch control bits for prefetching, stalling, or realigning in order to handle padding bits and instructions that cross memory line boundaries | — | 2011-01-18 |
| 7574583 | Processing apparatus including dedicated issue slot for loading immediate value, and processing method therefor | Willem Charles Mallon | 2009-08-11 |
| 7555576 | Processing apparatus with burst read write operations | — | 2009-06-30 |
| 7313671 | Processing apparatus, processing method and compiler | — | 2007-12-25 |
| 7308540 | Pseudo multiport data memory has stall facility | — | 2007-12-11 |
| 7302555 | Zero overhead branching and looping in time stationary processors | — | 2007-11-27 |
| 7231478 | Programmed access latency in mock multiport memory | — | 2007-06-12 |
| 7082518 | Interruptible digital signal processor having two instruction sets | Marco Jan Gerrit Bekooij, Adrianus Bink, Johan Van Gageldonk, Jan Hoogerbrugge, Bart Mesman | 2006-07-25 |
| 7032102 | Signal processing device and method for supplying a signal processing result to a plurality of registers | Marco Jan Gerrit Bekooij, Adrianus Bink, Johan Van Gageldonk, Jan Hoogerbrugge, Bart Mesman +1 more | 2006-04-18 |
| 6948158 | Retargetable compiling system and method | Johan Van Gageldonk, Marco Jan Gerrit Bekooij, Adrianus Bink, Jan Hoogerbrugge, Bart Mesman | 2005-09-20 |
| 6643738 | Data processor utilizing set-associative cache memory for stream and non-stream memory addresses | Adwin H. Timmer, Francoise Harmsze, Jozef L. Van Meerbergen | 2003-11-04 |
| 6400410 | Signal processing device and method of planning connections between processors in a signal processing device | Adwin H. Timmer, Jozef L. Van Meerbergen | 2002-06-04 |
| 6049818 | Signal processing device | Jozef L. Van Meerbergen, Adwin H. Timmer | 2000-04-11 |