| 12348390 |
Overlay network for improved real-time packet flows |
Duke C. Hong |
2025-07-01 |
|
| 12282774 |
Vector processor utilizing massively fused operations |
Zoran Zivkovic, Jian-Guo Chen, Hong Wan, David Thomas Dougherty, Jay O'Neill |
2025-04-22 |
|
| 12248333 |
Processor embedded streaming buffer |
— |
2025-03-11 |
|
| 12106101 |
Vector processor supporting linear interpolation on multiple dimensions |
Kameran Azadet, Zoran Zivkovic |
2024-10-01 |
$20,560,000 |
| 11989554 |
Processing pipeline with zero loop overhead |
Kameran Azadet, Jeroen Leijten |
2024-05-21 |
$18,840,000 |
| 11334356 |
Apparatuses, methods, and systems for a user defined formatting instruction to configure multicast Benes network circuitry |
Jian-Guo Chen, David Thomas Dougherty, Steven C. Pinault, Parakalan Venkataraghavan, Meng-Lin Yu +1 more |
2022-05-17 |
$14,251,000 |
| 11074213 |
Apparatuses, methods, and systems for vector processor architecture having an array of identical circuit blocks |
Jay O'Neill, Jeroen Leijten, Harm Peters, Eugene Scuteri |
2021-07-27 |
$27,337,000 |
| 9778902 |
Software digital front end (SoftDFE) signal processing |
Kameran Azadet, Chengzhou Li, Albert Molina, Joseph H. Othmer, Steven C. Pinault +3 more |
2017-10-03 |
$11,313,000 |
| 9621130 |
Configurable generic filter hardware block and methods |
Parakalan Venkataraghavan, Sanal Cheruvathery, Meng-Lin Yu |
2017-04-11 |
$32,302,000 |
| 9529567 |
Digital processor having instruction set with complex exponential non-linear function |
Kameran Azadet, Albert Molina, Joseph H. Othmer, Parakalan Venkataraghavan, Meng-Lin Yu |
2016-12-27 |
$11,980,000 |
| 9363068 |
Vector processor having instruction set with sliding window non-linear convolutional function |
Kameran Azadet, Meng-Lin Yu |
2016-06-07 |
$9,646,000 |
| 9280315 |
Vector processor having instruction set with vector convolution function for fir filtering |
Kameran Azadet, Meng-Lin Yu, Joseph H. Othmer, Albert Molina |
2016-03-08 |
$14,558,000 |
| 9223752 |
Digital signal processor with one or more non-linear functions using factorized polynomial interpolation |
Kameran Azadet, Jian-Guo Chen, Samer Hijazi |
2015-12-29 |
$8,962,000 |
| 9207910 |
Digital signal processor having instruction set with an xK function using reduced look-up table |
Kameran Azadet, Jian-Guo Chen, Samer Hijazi |
2015-12-08 |
$12,754,000 |
| 9176735 |
Digital signal processor having instruction set with one or more non-linear complex functions |
Kameran Azadet, Jian-Guo Chen, Samer Hijazi |
2015-11-03 |
$14,434,000 |
| 9170776 |
Digital signal processor having instruction set with a logarithm function using reduced look-up table |
Kameran Azadet, Jian-Guo Chen, Samer Hijazi |
2015-10-27 |
$18,168,000 |
| 9128790 |
Digital signal processor having instruction set with an exponential function using reduced look-up table |
Kameran Azadet, Jian-Guo Chen, Samer Hijazi |
2015-09-08 |
$18,285,000 |
| 9069686 |
Digital signal processor having instruction set with one or more non-linear functions using reduced look-up table with exponentially varying step-size |
Kameran Azadet, Jian-Guo Chen, Samer Hijazi |
2015-06-30 |
$18,547,000 |
| 9069685 |
Digital signal processor having instruction set with one or more non-linear functions using reduced look-up table |
Kameran Azadet, Jian-Guo Chen, Samer Hijazi |
2015-06-30 |
$18,547,000 |
| 7299483 |
System and method for determining and notifying users of the expected time-channel for a television series |
— |
2007-11-20 |
|
