YU

Yuso Udo

KT Kabushiki Kaisha Toshiba: 6 patents #4,898 of 21,451Top 25%
📍 Chofu, JP: #110 of 517 inventorsTop 25%
Overall (All Time): #868,003 of 4,157,543Top 25%
6
Patents All Time

Issued Patents All Time

Showing 1–6 of 6 patents

Patent #TitleCo-InventorsDate
7700381 Semiconductor wafer with ID mark, equipment for and method of manufacturing semiconductor device from them Tsunetoshi Arikado, Masao Iwase, Soichi Nadahara, Yukihiro Ushiku, Shinichi Nitta +8 more 2010-04-20
7420249 Semiconductor device formed in semiconductor layer arranged on substrate with one of insulating film and cavity interposed between the substrate and the semiconductor layer Tsutomu Sato, Hajime Nagano, Ichiro Mizushima, Takashi Yamada, Shinichi Nitta 2008-09-02
7057259 Semiconductor wafer with ID mark, equipment for and method of manufacturing semiconductor device from them Tsunetoshi Arikado, Masao Iwase, Soichi Nadahara, Yukihiro Ushiku, Shinichi Nitta +8 more 2006-06-06
7019365 Semiconductor device formed in semiconductor layer arranged on substrate with one of insulating film and cavity interposed between the substrate and the semiconductor layer Tsutomu Sato, Hajime Nagano, Ichiro Mizushima, Takashi Yamada, Shinichi Nitta 2006-03-28
6630714 Semiconductor device formed in semiconductor layer arranged on substrate with one of insulating film and cavity interposed between the substrate and the semiconductor layer Tsutomu Sato, Hajime Nagano, Ichiro Mizushima, Takashi Yamada, Shinichi Nitta 2003-10-07
6515733 Pattern exposure apparatus for transferring circuit pattern on semiconductor wafer and pattern exposure method 2003-02-04