Issued Patents All Time
Showing 1–25 of 33 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12237014 | Semiconductor memory device with memory cells each including a charge accumulation layer and a control gate | Takatoshi Minamoto, Dai Nakamura | 2025-02-25 |
| 11881465 | Semiconductor storage device with transistors of peripheral circuits on two chips | Nobuaki OKADA | 2024-01-23 |
| 11610630 | Semiconductor memory device with memory cells each including a charge accumulation layer and a control gate | Takatoshi Minamoto, Dai Nakamura | 2023-03-21 |
| 11302398 | Semiconductor memory device capable of reducing chip size | Katsuaki Isobe, Noboru Shibata | 2022-04-12 |
| 10978151 | Semiconductor memory device with memory cells each including a charge accumulation layer and a control gate | Takatoshi Minamoto, Dai Nakamura | 2021-04-13 |
| 10783971 | Semiconductor memory device capable of reducing chip size | Katsuaki Isobe, Noboru Shibata | 2020-09-22 |
| 10431309 | Semiconductor memory device with memory cells each including a charge accumulation layer and a control gate | Takatoshi Minamoto, Dai Nakamura | 2019-10-01 |
| 10347341 | Semiconductor memory device capable of reducing chip size | Katsuaki Isobe, Noboru Shibata | 2019-07-09 |
| 10304538 | Semiconductor memory device with memory cells each including a charge accumulation layer and a control gate | Takatoshi Minamoto, Dai Nakamura | 2019-05-28 |
| 10068647 | Semiconductor memory device | Nobuaki OKADA | 2018-09-04 |
| 10049745 | Semiconductor memory device with memory cells each including a charge accumulation layer and a control gate | Takatoshi Minamoto, Dai Nakamura | 2018-08-14 |
| 9934861 | Semiconductor memory device capable of reducing chip size | Katsuaki Isobe, Noboru Shibata | 2018-04-03 |
| 9691484 | Semiconductor memory device with memory cells each including a charge accumulation layer and a control gate | Takatoshi Minamoto, Dai Nakamura | 2017-06-27 |
| 9633736 | Semiconductor memory device capable of reducing chip size | Katsuaki Isobe, Noboru Shibata | 2017-04-25 |
| 9324432 | Semiconductor memory device with memory cells each including a charge accumulation layer and a control gate | Takatoshi Minamoto, Dai Nakamura | 2016-04-26 |
| 9129688 | Semiconductor memory device capable of reducing chip size | Katsuaki Isobe, Noboru Shibata | 2015-09-08 |
| 8630106 | Semiconductor memory device with memory cells each including a charge accumulation layer and a control gate | Takatoshi Minamoto, Dai Nakamura | 2014-01-14 |
| 8315094 | Semiconductor memory device | Kazushige Kanda, Katsuaki Isobe | 2012-11-20 |
| 8295090 | Semiconductor memory device capable of reducing chip size | Katsuaki Isobe, Noboru Shibata | 2012-10-23 |
| 8283791 | Semiconductor device and method for manufacturing same | Takayuki Toba, Tohru Ozaki, Hiromitsu Mashita, Takafumi Taguchi | 2012-10-09 |
| 8274826 | NAND type flash memory | Toshifumi Hashimoto, Noboru Shibata, Tsuneo Inaba | 2012-09-25 |
| 8243491 | Semiconductor integrated circuit including semiconductor memory | Hiromitsu Mashita | 2012-08-14 |
| 8243524 | Semiconductor storage device | Yuya Suzuki, Yoshikazu HOSOMURA | 2012-08-14 |
| 7721239 | Semiconductor integrated circuit with connecting lines for connecting conductive lines of a memory cell array to a driver | Yoshiko Kato, Shigeru Ishibashi, Mitsuhiro Noguchi | 2010-05-18 |
| 6928596 | Test circuit of semiconductor integrated circuit | Tohru Kimura | 2005-08-09 |