Issued Patents All Time
Showing 126–150 of 176 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6538916 | Semiconductor memory device | — | 2003-03-25 |
| 6388380 | Electric discharge lamp lighting unit | Fumihiro Minami | 2002-05-14 |
| 6358432 | Composite magnetic material and inductor element | Kunisaburo Tomono, Mitsuhiro Fukushima, Hiroshi Marusawa, Takashi Toda | 2002-03-19 |
| 6351426 | DRAM having a power supply voltage lowering circuit | — | 2002-02-26 |
| 6324518 | Electronic information utilization promotion system | Hiroshi Katsurabayashi, Eriko Tamaru, Shigehiko Sasaki | 2001-11-27 |
| 6292424 | DRAM having a power supply voltage lowering circuit | — | 2001-09-18 |
| 6229384 | Semiconductor integrated circuit containing power voltage regulating circuit which employs depletion-type transistor | — | 2001-05-08 |
| 6137345 | Semiconductor integrated circuit including a boosted potential generating circuit | Tetsuya Kaneko | 2000-10-24 |
| 6130450 | Stacked capacitor-type semiconductor storage device and manufacturing method thereof | Yusuke Kohyama, Shizuo Sawada | 2000-10-10 |
| 6122215 | DRAM having a power supply voltage lowering circuit | — | 2000-09-19 |
| 6075746 | DRAM device with function of producing wordline drive signal based on stored charge in capacitor | — | 2000-06-13 |
| 6069828 | Semiconductor memory device having voltage booster circuit | Tetsuya Kaneko | 2000-05-30 |
| 5970016 | Dynamic semiconductor memory device with banks capable of operating independently | — | 1999-10-19 |
| 5936282 | Semiconductor device having input protection circuit | Takatsugu Baba | 1999-08-10 |
| 5933383 | DRAM having a power supply voltage lowering circuit | — | 1999-08-03 |
| 5917764 | Semiconductor memory device | Hiroshi Maejima | 1999-06-29 |
| 5870340 | Multiplexer | — | 1999-02-09 |
| 5854768 | DRAM having a power supply voltage lowering circuit | — | 1998-12-29 |
| 5828611 | Semiconductor memory device having internal voltage booster circuit coupled to bit line charging/equalizing circuit | Tetsuya Kaneko | 1998-10-27 |
| 5809225 | Semiconductor memory with built-in parallel bit test mode | Shuso Fujii | 1998-09-15 |
| 5761109 | Semiconductor memory device having folded bit line array and an open bit line array with imbalance correction | Daisaburo Takashima, Tsuneo Inaba, Yukihito Oowaki, Shinichiro Shiratake | 1998-06-02 |
| 5751639 | DRAM having a power supply voltage lowering circuit | — | 1998-05-12 |
| 5701095 | High speed, low noise CMOS multiplexer with precharge | — | 1997-12-23 |
| 5689461 | Semiconductor memory device having voltage booster circuit coupled to a bit line charging/equalizing circuit or switch | Tetsuya Kaneko | 1997-11-18 |
| 5592421 | Semiconductor integrated circuit for generating an internal power source voltage with reduced potential changes | Tetsuya Kaneko | 1997-01-07 |