Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5488002 | Method for manufacturing self-aligned bipolar transistors using double diffusion | Koji Kimura | 1996-01-30 |
| 5399511 | Method of manufacturing a hetero bipolar transistor | Kouji Kimura, Hiroshi Naruse, Kuniaki Kumamaru | 1995-03-21 |
| 5365090 | Hetero bipolar transistor and method of manufacturing the same | Kouji Kimura, Hiroshi Naruse, Kuniaki Kumamaru | 1994-11-15 |
| 5356821 | Method for manufacturing semiconductor integrated circuit device | Hiroshi Naruse | 1994-10-18 |
| 5244533 | Method of manufacturing bipolar transistor operated at high speed | Koji Kimura | 1993-09-14 |
| 5204276 | Method of manufacturing semiconductor device | Hiroomi Nakajima, Nobuyuki Itoh, Hiroyuki Nihira, Eiryo Tsukioka, Kenji Hirakawa +3 more | 1993-04-20 |
| 5148252 | Bipolar transistor | — | 1992-09-15 |
| 5102826 | Method of manufacturing a semiconductor device having a silicide layer | Jiro Ohshima, Toshiyo Motozima, Hiroshi Naruse | 1992-04-07 |
| 4975381 | Method of manufacturing super self-alignment technology bipolar transistor | Jiro Ohshima | 1990-12-04 |
| 4910170 | Method of manufacturing semiconductor device | Toshiyo Motozima, Jiro Oshima | 1990-03-20 |
| 4871685 | Method of manufacturing bipolar transistor with self-aligned external base and emitter regions | Jiro Ohshima | 1989-10-03 |
| 4853342 | Method of manufacturing semiconductor integrated circuit device having transistor | Jiro Ohshima | 1989-08-01 |
| 4766086 | Method of gettering a semiconductor device and forming an isolation region therein | Jiro Ohshima, Toshiyo Ito, Masaharu Aoyama | 1988-08-23 |
| 4717682 | Method of manufacturing a semiconductor device with conductive trench sidewalls | Jiro Ohshima, Masahiro Abe, Masaharu Aoyama | 1988-01-05 |