Issued Patents All Time
Showing 26–46 of 46 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6717871 | Semiconductor device with flexible redundancy system | — | 2004-04-06 |
| 6717883 | Semiconductor memory for logic-hybrid memory | — | 2004-04-06 |
| 6674675 | Semiconductor device with flexible redundancy system | — | 2004-01-06 |
| 6577551 | Semiconductor integrated circuit having a built-in data storage circuit for nonvolatile storage of control data | Mikihiko Ito, Masaru Koyanagi, Takahiko Hara, Tohru Kimura | 2003-06-10 |
| 6567336 | Semiconductor memory for logic-hybrid memory | — | 2003-05-20 |
| 6542420 | Semiconductor device with flexible redundancy system | — | 2003-04-01 |
| 6496442 | Dynamic random access memory device and semiconductor integrated circuit device | Masaru Koyanagi, Kaoru Nakagawa, Takahiko Hara | 2002-12-17 |
| 6490210 | Semiconductor memory integrated circuit employing a redundant circuit system for compensating for defectiveness | Takeshi Nagai | 2002-12-03 |
| 6370077 | Dynamic random access memory device and semiconductor integrated circuit device | Masaru Koyanagi, Kaoru Nakagawa, Takahiko Hara | 2002-04-09 |
| 6370080 | Semiconductor memory for logic-hybrid memory | — | 2002-04-09 |
| 6314032 | Semiconductor device with flexible redundancy system | — | 2001-11-06 |
| RE37427 | Dynamic type memory | Masaki Ogihara, Kiyofumi Sakurai | 2001-10-30 |
| 6188618 | Semiconductor device with flexible redundancy system | — | 2001-02-13 |
| 6134174 | Semiconductor memory for logic-hybrid memory | — | 2000-10-17 |
| 5712827 | Dynamic type memory | Masaki Ogihara, Kiyofumi Sakurai | 1998-01-27 |
| 5642326 | Dynamic memory | Kiyofumi Sakurai, Masaki Ogihara | 1997-06-24 |
| 5586078 | Dynamic type memory | Kiyofumi Sakurai, Masaki Ogihara | 1996-12-17 |
| 5500815 | Semiconductor memory | Tohru Furuyama | 1996-03-19 |
| 5410512 | Semiconductor memory device | Tohru Furuyama, Donald C. Stark, Natsuki Kushiyama, Kiyofumi Sakurai, Hiroyuki Noji +1 more | 1995-04-25 |
| 5367481 | Dynamic random access memory with complementary bit lines and capacitor common line | Tohru Furuyama | 1994-11-22 |
| 5341326 | Semiconductor memory having memory cell units each including cascade-connected MOS transistors | Natsuki Kushiyama, Tohru Furuyama | 1994-08-23 |