Issued Patents All Time
Showing 51–74 of 74 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7443709 | Temperature sensing circuit, voltage generation circuit, and semiconductor storage device | Daisaburo Takashima | 2008-10-28 |
| 7426147 | Power supply voltage control circuit | Daisaburo Takashima | 2008-09-16 |
| 7411809 | Ferroelectric memory to be tested by applying disturbance voltage to a plurality of ferroelectric capacitors at once in direction to weaken polarization, and method of testing the same | Daisaburo Takashima | 2008-08-12 |
| 7295456 | Chain ferroelectric random access memory (CFRAM) having an intrinsic transistor connected in parallel with a ferroelectric capacitor | Daisaburo Takashima, Sumio Tanaka, Yukihito Oowaki, Yoshiaki Takeuchi | 2007-11-13 |
| 7233536 | Semiconductor memory device having memory cells to store cell data and reference data | Daisaburo Takashima | 2007-06-19 |
| 7142473 | Semiconductor device having semiconductor memory with sense amplifier | Daisaburo Takashima, Michael Jacob | 2006-11-28 |
| 7092304 | Semiconductor memory | Daisaburo Takashima, Thomas Roehr | 2006-08-15 |
| 7061788 | Semiconductor storage device | Daisaburo Takashima | 2006-06-13 |
| 7057917 | Ferroelectric memory with an intrinsic access transistor coupled to a capacitor | Daisaburo Takashima, Sumio Tanaka, Yukihito Oowaki, Yoshiaki Takeuchi | 2006-06-06 |
| 7053431 | Phase-change memory device using chalcogenide compound as the material of memory cells | — | 2006-05-30 |
| 7046541 | Semiconductor integrated circuit device | Daisaburo Takashima | 2006-05-16 |
| 6993691 | Series connected TC unit type ferroelectric RAM and test method thereof | Daisaburo Takashima, Yukihito Oowaki, Katsuhiko Hoya, Takeshi Watanabe | 2006-01-31 |
| 6980460 | Semiconductor integrated circuit device and operation method therefor | Shinichiro Shiratake | 2005-12-27 |
| 6944046 | Ferroelectric memory and method of testing the same | — | 2005-09-13 |
| 6898104 | Semiconductor device having semiconductor memory with sense amplifier | Daisaburo Takashima, Michael Jacob | 2005-05-24 |
| 6671200 | Ferroelectric random access memory with isolation transistors coupled between a sense amplifier and an equalization circuit | Daisaburo Takashima, Sumio Tanaka, Yukihito Oowaki, Yoshiaki Takeuchi | 2003-12-30 |
| 6552922 | Chain-type ferroelectric random access memory (FRAM) with rewrite transistors coupled between a sense amplifier and a bit line pair | Daisaburo Takashima, Sumio Tanaka, Yukihito Oowaki, Yoshiaki Takeuchi | 2003-04-22 |
| 6473330 | Chain type ferroelectric memory with isolation transistors coupled between a sense amplifier and an equalization circuit | Daisaburo Takashima, Sumio Tanaka, Yukihito Oowaki, Yoshiaki Takeuchi | 2002-10-29 |
| 6288961 | Semiconductor memory device for reading charges stored in capacitor in memory cell and data reading method thereof | Sumio Tanaka | 2001-09-11 |
| 6111777 | Ferroelectric memory | Sumio Tanaka | 2000-08-29 |
| 6023438 | Semiconductor memory device for reading charges stored in capacitor in memory cell and data reading method thereof | Sumio Tanaka | 2000-02-08 |
| 5892724 | NAND-type dynamic RAM having temporary storage register and sense amplifier coupled to multi-open bit lines | Takehiro Hasegawa, Yukihito Oowaki, Fujio Masuoka, Shinichiro Shiratake, Shigeyoshi Watanabe | 1999-04-06 |
| 5625602 | NAND-type dynamic RAM having temporary storage register and sense amplifier coupled to multi-open bit lines | Takehiro Hasegawa, Yukihito Oowaki, Fujio Masuoka, Shinichiro Shiratake, Shigeyoshi Watanabe | 1997-04-29 |
| 5418750 | Semiconductor memory device for suppressing noises occurring on bit and word lines | Shinichiro Shiratake, Takehiro Hasegawa, Daisaburo Takashima, Ryo Fukuda | 1995-05-23 |