MI

Masahiro Inohara

KT Kabushiki Kaisha Toshiba: 14 patents #2,131 of 21,451Top 10%
TI Toray Industries: 2 patents #1,308 of 3,690Top 40%
Toshiba Memory: 2 patents #853 of 1,971Top 45%
📍 Fujisawa, NY: #1 of 1 inventorsTop 100%
Overall (All Time): #236,446 of 4,157,543Top 6%
19
Patents All Time

Issued Patents All Time

Showing 1–19 of 19 patents

Patent #TitleCo-InventorsDate
10957641 Semiconductor device and manufacturing method thereof 2021-03-23
10615115 Semiconductor device and manufacturing method thereof 2020-04-07
9576948 Semiconductor device Kanako Komatsu, Keita Takahashi 2017-02-21
9318548 Semiconductor device Yasunori Iwatsu 2016-04-19
8970048 Interconnect structure for high frequency signal transmissions 2015-03-03
8629437 Semiconductor device and manufacturing method thereof Tatsuya Ishida 2014-01-14
8546518 Polyarylene sulfide and method for producing the same Takeshi Unohara, Hiroyuki Isago, Toru Nishimura 2013-10-01
8252692 Semiconductor device and method of fabricating the same 2012-08-28
8102059 Interconnect structure for high frequency signal transmissions 2012-01-24
7994641 Semiconductor device and method of fabricating the same 2011-08-09
7325225 Method and apparatus for reducing OPC model errors Yasushi Tanaka, Matthew S. Angyal 2008-01-29
7045415 MIM capacitor having flat diffusion prevention films Takashi Yoshitomi, Tatsuya Ohguro, Ryoji Hasumi, Hideki Kimijima, Takashi Yamaguchi 2006-05-16
6894331 MIM capacitor having flat diffusion prevention films Takashi Yoshitomi, Tatsuya Ohguro, Ryoji Hasumi, Hideki Kimijima, Takashi Yamaguchi 2005-05-17
6525402 Semiconductor wafer, method of manufacturing the same and semiconductor device Masahiko Matsumoto, Hisato Oyamatsu, Takeo Nakayama, Yasuhiro Fukaura, Kunihiro Kasai 2003-02-25
6462248 Method for producing aromatic compounds having alkyl group with at least three carbon atoms Jiro Nakatani, Eiichi Minomiya, Kazuyoshi Iwayama, Tetsuya Kato 2002-10-08
6163067 Semiconductor apparatus having wiring groove and contact hole in self-alignment manner Hideki Shibata, Tadashi Matsuno 2000-12-19
5976972 Method of making semiconductor apparatus having wiring groove and contact hole formed in a self-alignment manner Hideki Shibata, Tadashi Matsuno 1999-11-02
5966634 Method of manufacturing semiconductor device having multi-layer wiring structure with diffusion preventing film Minakshisundaran Balasubramanian Anand, Tadashi Matsuno 1999-10-12
5948698 Manufacturing method of semiconductor device using chemical mechanical polishing Tadashi Matsuno 1999-09-07