Issued Patents All Time
Showing 26–50 of 124 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5969989 | Semiconductor memory device capable of storing plural-bit data in a single memory cell | — | 1999-10-19 |
| 5953274 | Semiconductor memory device capable of storing plural-bit data in a single memory cell | — | 1999-09-14 |
| 5923588 | Non-volatile semiconductor memory device with a plurality of programming voltage levels | — | 1999-07-13 |
| 5877982 | Semiconductor memory device including circuitry for selecting a block in both read and write modes | — | 1999-03-02 |
| 5877981 | Nonvolatile semiconductor memory device having a matrix of memory cells | — | 1999-03-02 |
| 5824583 | Non-volatile semiconductor memory and method of manufacturing the same | Masamichi Asano, Ryouhei Kirisawa, Ryozo Nakayama, Satoshi Inoue, Riichiro Shirota +2 more | 1998-10-20 |
| 5808939 | Non-volatile semiconductor memory device and data programming method | — | 1998-09-15 |
| 5793690 | Semiconductor memory device capable of storing plural-bit data in a single memory cell | — | 1998-08-11 |
| 5745413 | Electrically programmable nonvolatile semiconductor memory device with NAND cell structure | — | 1998-04-28 |
| 5650656 | Semiconductor memory device capable of storing plural-bit data in a single memory cell | — | 1997-07-22 |
| 5610858 | Non-volatile semiconductor memory device and method of manufacturing the same | — | 1997-03-11 |
| 5597748 | Method of manufacturing NAND type EEPROM | Masamichi Asano, Ryouhei Kirisawa, Ryozo Nakayama, Satoshi Inoue, Riichiro Shirota +2 more | 1997-01-28 |
| 5596525 | Memory cell of nonvolatile semiconductor memory device | — | 1997-01-21 |
| 5579260 | Non-volatile semiconductor memory device and data programming method | — | 1996-11-26 |
| 5557570 | Nonvolatile semiconductor memory device | — | 1996-09-17 |
| 5519660 | Semiconductor memory device | — | 1996-05-21 |
| 5517449 | Memory cell of nonvolatile semiconductor memory device | — | 1996-05-14 |
| 5508957 | Non-volatile semiconductor memory with NAND cell structure and switching transistors with different channel lengths to reduce punch-through | Masaki Momodomi, Fujio Masuoka, Yasuo Itoh, Yoshihisa Iwata, Masahiko Chiba +6 more | 1996-04-16 |
| 5477500 | Decode circuit for a semiconductor memory device | — | 1995-12-19 |
| 5450361 | Semiconductor memory device having redundant memory cells | Hiroto Nakai, Kazuhisa Kanazawa, Isao Sato | 1995-09-12 |
| 5448517 | Electrically programmable nonvolatile semiconductor memory device with NAND cell structure | — | 1995-09-05 |
| 5428570 | Nonvolatile semiconductor memory device | — | 1995-06-27 |
| 5364805 | Method of manufacturing an EEPROM having an erasing gate electrode | Tadayuki Taura, Masamichi Asano, Kazunori Kanebako | 1994-11-15 |
| 5336952 | Semiconductor integrated circuit protected from element breakdown by reducing the electric field between the gate and drain or source of a field effect transistor | Toshiyuki Fujimoto, Akira Narita | 1994-08-09 |
| 5323039 | Non-volatile semiconductor memory and method of manufacturing the same | Masamichi Asano, Ryouhei Kirisawa, Ryozo Nakayama, Satoshi Inoue, Riichiro Shirota +2 more | 1994-06-21 |