CT

Chikako Tokunaga

KT Kabushiki Kaisha Toshiba: 19 patents #1,558 of 21,451Top 8%
Overall (All Time): #238,804 of 4,157,543Top 6%
19
Patents All Time

Issued Patents All Time

Showing 1–19 of 19 patents

Patent #TitleCo-InventorsDate
9557379 Semiconductor integrated circuit Kenichi Anzou 2017-01-31
9443611 Semiconductor integrated circuit with bist circuit Kenichi Anzou 2016-09-13
9159456 Semiconductor device Kenichi Anzou 2015-10-13
8671317 Built-in self test circuit and designing apparatus Kenichi Anzou 2014-03-11
8599632 Semiconductor integrated circuit Kenichi Anzou 2013-12-03
8201037 Semiconductor integrated circuit and method for controlling semiconductor integrated circuit Kenichi Anzou 2012-06-12
8176372 Semiconductor integrated circuit Kenichi Anzou 2012-05-08
8134880 Semiconductor integrated circuit Kenichi Anzou 2012-03-13
8037376 On-chip failure analysis circuit and on-chip failure analysis method Kenichi Anzou 2011-10-11
8032803 Semiconductor integrated circuit and test system thereof Kenichi Anzou 2011-10-04
7962821 Built-in self testing circuit with fault diagnostic capability Kenichi Anzou 2011-06-14
7797591 Semiconductor integrated circuit, design support software system, and automatic test pattern generation system Tetsu Hasegawa 2010-09-14
7783942 Integrated circuit device with built-in self test (BIST) circuit Kenichi Anzou 2010-08-24
7734975 Semiconductor integrated circuit having built-n self test circuit of logic circuit and embedded device, and design apparatus thereof Kenichi Anzou, Tetsu Hasegawa 2010-06-08
7653854 Semiconductor integrated circuit having a (BIST) built-in self test circuit for fault diagnosing operation of a memory Kenichi Anzou 2010-01-26
7577885 Semiconductor integrated circuit, design support software system and automatic test pattern generation system Tetsu Hasegawa 2009-08-18
7254762 Semiconductor integrated circuit Kenichi Anzou 2007-08-07
7228262 Semiconductor integrated circuit verification system Kenichi Anzou, Takashi Matsumoto 2007-06-05
7120890 Apparatus for delay fault testing of integrated circuits Koji Urata, Kenichi Anzou, Tetsu Hasegawa 2006-10-10