Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7444566 | Memory device fail summary data reduction for improved redundancy analysis | — | 2008-10-28 |
| 7421632 | Mapping logic for controlling loading of the select ram of an error data crossbar multiplexer | Stephen D Jordan | 2008-09-02 |
| 6779140 | Algorithmically programmable memory tester with test sites operating in a slave mode | Alan S. Krech, Jr., Edmundo De La Puente | 2004-08-17 |
| 6539507 | Integrated circuit with alternately selectable state evaluation provisions | Christopher M. Juenemann, Bradley J Goertzen, Rory L. Fisher, Randy L Fiscus, Brian C. Miller +4 more | 2003-03-25 |
| 6125437 | Virtual linear frame buffer addressing method and apparatus | — | 2000-09-26 |
| 6091432 | Method and apparatus for improved block transfers in computer graphics frame buffers | Michael R. Diehl | 2000-07-18 |
| 5777628 | Method and apparatus for detecting cache collisions in a two dimensional memory | — | 1998-07-07 |