| 7421632 |
Mapping logic for controlling loading of the select ram of an error data crossbar multiplexer |
Joel Buck-Gengler |
2008-09-02 |
| 7339844 |
Memory device fail summary data reduction for improved redundancy analysis |
Alan S. Krech, Jr., John M Freeseman |
2008-03-04 |
| 7181660 |
Reconstruction of non-deterministic algorithmic tester stimulus used as input to a device under test |
Alan S. Krech, Jr., Hsiu-Huan Shen |
2007-02-20 |
| 7076714 |
Memory tester uses arbitrary dynamic mappings to serialize vectors into transmitted sub-vectors and de-serialize received sub-vectors into vectors |
John Howard Cook, III, Alan S. Krech, Jr., Edmundo De La Puente, John M Freesman |
2006-07-11 |
| 6968545 |
Method and apparatus for no-latency conditional branching |
Alan S. Krech, Jr. |
2005-11-22 |
| 6851076 |
Memory tester has memory sets configurable for use as error catch RAM, Tag RAM's, buffer memories and stimulus log RAM |
John Howard Cook, III, Preet Paul Singh |
2005-02-01 |
| 6833695 |
Simultaneous display of data gathered using multiple data gathering mechanisms |
Hsui-Huan Shen, Alan S. Krech, Jr. |
2004-12-21 |
| 6781584 |
Recapture of a portion of a displayed waveform without loss of existing data in the waveform display |
Hsiu-Huan Shen, Alan S. Krech, Jr. |
2004-08-24 |
| 6687861 |
Memory tester with enhanced post decode |
John M Freeseman, Samuel U Wong |
2004-02-03 |
| 6598112 |
Method and apparatus for executing a program using primary, secondary and tertiary memories |
Alan S. Krech, Jr. |
2003-07-22 |
| 6574764 |
Algorithmically programmable memory tester with history FIFO's that aid in error analysis and recovery |
Alan S. Krech, Jr. |
2003-06-03 |
| 5949920 |
Reconfigurable convolver circuit |
Catherine J. Pfister |
1999-09-07 |
| 5826095 |
Method and apparatus for maintaining the order of data items processed by parallel processors |
— |
1998-10-20 |