Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7288449 | Method of manufacturing an ESD protection device with the same mask for both LDD and ESD implantation | Ming-Dou Ker, Hsin-Chyh Hsu | 2007-10-30 |
| 7193314 | Semiconductor devices and substrates used in thereof | Wei-Feng Lin, Chung-Ju Wu, Wen-Dong Yen | 2007-03-20 |
| 7170726 | Uniform turn-on design on multiple-finger MOSFET for ESD protection application | Ming-Dou Ker, Che-Hao Chuang | 2007-01-30 |
| 7064942 | ESD protection circuit with tunable gate-bias | Ming-Dou Ker | 2006-06-20 |
| 7049659 | Method of manufacturing an ESD protection device with the same mask for both LDD and ESD implantation | Ming-Dou Ker, Hsin-Chyh Hsu | 2006-05-23 |
| 7023676 | Low-voltage triggered PNP for ESD protection in mixed voltage I/O interface | Ming-Dou Ker | 2006-04-04 |
| 6987416 | Low-voltage curvature-compensated bandgap reference | Ming-Dou Ker, Ching-Yun Chu | 2006-01-17 |
| 6885534 | Electrostatic discharge protection device for giga-hertz radio frequency integrated circuits with varactor-LC tanks | Ming-Dou Ker, Cheng-Ming Lee | 2005-04-26 |
| 6885179 | Low-voltage bandgap reference | Ming-Dou Ker, Ching-Yun Chu | 2005-04-26 |
| 6753595 | Substrates for semiconductor devices with shielding for NC contacts | Wei-Feng Lin, Chung-Ju Wu, Wen-Dong Yen | 2004-06-22 |
| 6744107 | ESD protection circuit with self-triggered technique | Ming-Dou Ker, Kuo-Chun Hsu | 2004-06-01 |
| 6671153 | Low-leakage diode string for use in the power-rail ESD clamp circuits | Ming-Dou Ker, Hun-Hsien Chang | 2003-12-30 |
| 6657835 | ESD protection circuit for mixed-voltage I/O by using stacked NMOS transistors with substrate triggering technique | Ming-Dou Ker, Chien-Hui Chuang | 2003-12-02 |