Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12405899 | Innovative way to improve the translation lookaside buffer (TLB) miss latency | Brian M. Rogers | 2025-09-02 |
| 12380072 | Method and system for performing a compaction/merge job using a merge based tile architecture | Brian M. Rogers, Pradipkumar Arunbhai Thaker | 2025-08-05 |
| 12147299 | Mechanism for improved data availability for DRAM in the presence of uncorrectable errors | Brian M. Rogers, Pradipkumar Arunbhai Thaker | 2024-11-19 |
| 10204698 | Method to dynamically inject errors in a repairable memory on silicon and a method to validate built-in-self-repair logic | Babji Vallabhaneni, Vijay Parmar, Mitrajit Chatterjee | 2019-02-12 |
| 9858226 | Two wire serial voltage identification protocol | Jayesh Iyer, Edward R. Stanford | 2018-01-02 |
| 9424165 | Debugging processor hang situations using an external pin | Sukanto Ghosh | 2016-08-23 |
| 9268627 | Processor hang detection and recovery | Sukanto Ghosh | 2016-02-23 |
| 8868956 | System-on-chip with feedback loop for processor frequency control | Pradeep Dharane, Yoon Sang Chae, Sunil Kumar Singla | 2014-10-21 |
| 8806140 | Dynamic memory module switching with read prefetch caching | George Beshara Bendak | 2014-08-12 |
| 8786449 | System-on-chip with thermal management core | George Beshara Bendak | 2014-07-22 |
| 8706966 | System and method for adaptively configuring an L2 cache memory mesh | George Beshara Bendak | 2014-04-22 |
| 8635470 | System-on-chip with management module for controlling processor core internal voltages | George Beshara Bendak | 2014-01-21 |
| 8607023 | System-on-chip with dynamic memory module switching | George Beshara Bendak | 2013-12-10 |
| 8438358 | System-on-chip with memory speed control core | George Beshara Bendak | 2013-05-07 |
| 8417986 | Time negotiation using serial voltage identification communication | Jayesh Iyer, Edward R. Stanford | 2013-04-09 |
| 8412976 | Data negotiation using serial voltage identification communication | Jayesh Iyer, Edward R. Stanford | 2013-04-02 |
| 8407332 | System and method for in-network power management | Rajeev Ganesh | 2013-03-26 |