Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12332724 | Processing wakeup requests in a processing system having power management circuitry and a processing circuitry | Loic Hureau, Mohit Satsangi, Ray Marshall | 2025-06-17 |
| 12126334 | Very low voltage I/O circuit and method for screening defects | Hector Sanchez, Stephen Robert Traynor | 2024-10-22 |
| 11175723 | System and method of power mode management for a processor | Loic Hureau, Daniel McKenna, Jean-Philippe Meunier | 2021-11-16 |
| 11144677 | Method and apparatus for digital only secure test mode entry | Stefan Doll, Nikila Krishnamoorthy, Hubert Glenn Carson, Jr., Anurag Jindal, Hilario Manuel Garza +3 more | 2021-10-12 |
| 11047904 | Low power mode testing in an integrated circuit | Kumar Abhishek, Srikanth Jagannathan, Venkannababu Ambati, Mark Shelton Cinque, Joseph Wright | 2021-06-29 |
| 10013327 | Monitor, integrated circuit and method for monitoring an integrated circuit | Alistair Paul Roberston, Andrew Birnie | 2018-07-03 |
| 9940140 | Systems and methods of resetting a processor | Dirk Moeller | 2018-04-10 |
| 9841795 | Method for resetting an electronic device having independent device domains | Carl Culshaw, Sunny Gupta, Deboleena Minz Sakalley | 2017-12-12 |
| 9781120 | System on chip and method therefor | Michael Rohleder, Gary Hay, Stephan Mueller | 2017-10-03 |
| 9733952 | Microprocessor, and method of managing reset events therefor | Markus Baumeister, Carl Culshaw | 2017-08-15 |
| 9712153 | Method and device for reset modification based on system state | Markus Regner, Harald Michael Lüpken | 2017-07-18 |
| 9697065 | Systems and methods for managing reset | Kumar Abhishek, Steven K. Watkins, Garima Sharda, James M. Giandelone, Stefano Pietri | 2017-07-04 |
| 9448811 | Microprocessor device, and method of managing reset events therefor | Carl Culshaw, Nicolas Bernard Grossier | 2016-09-20 |
| 9246478 | Electronic device and method for generating clock signals with and without frequency jitter for one source clock signal generated by a single narrow-band source clock signal | Joseph C. Circello | 2016-01-26 |
| 9024663 | Clock glitch detection circuit | Michael Rohleder, Thomas Koch, Vladimir Litovtchenko | 2015-05-05 |
| 8841946 | Electronic circuit, safety critical system, and method for providing a reset signal | Joachim Kruecken | 2014-09-23 |
| 8552764 | Clock glitch detection circuit | Michael Rohleder, Thomas Koch, Vladimir Litovtchenko | 2013-10-08 |
| 8214722 | Method and system for signal error determination and correction in a flexray communication system | — | 2012-07-03 |
| 7958281 | Method and apparatus for transmitting data in a flexray node | Christian Steffen | 2011-06-07 |