| 9922838 |
Selective, electrochemical etching of a semiconductor |
Rajendra P. Dahal, Ishwara B. Bhat |
2018-03-20 |
| 8350293 |
Field effect transistor and method of manufacturing the same |
Takehiko Nomura, Yuki Niiyama, Hiroshi Kambayashi, Seikoh Yoshida |
2013-01-08 |
| 8188514 |
Transistor |
Masahiro Sugimoto, Zhongda Li, Tetsu Kachi, Tsutomu Uesugi |
2012-05-29 |
| 8159024 |
High voltage (>100V) lateral trench power MOSFET with low specific-on-resistance |
Kamal Raj Varadarajan |
2012-04-17 |
| 7144797 |
Semiconductor device having multiple-zone junction termination extension, and method for fabricating the same |
Peter Almern Losee, Santhosh Balachandran |
2006-12-05 |
| 6656774 |
Method to enhance operating characteristics of FET, IGBT, and MCT structures |
Victor A. K. Temple |
2003-12-02 |
| 5814859 |
Self-aligned transistor device including a patterned refracting dielectric layer |
Mario Ghezzo, James William Kretchmer, Richard Joseph Saia, William Andrew Hennessy |
1998-09-29 |
| 5510281 |
Method of fabricating a self-aligned DMOS transistor device using SiC and spacers |
Mario Ghezzo, James William Kretchmer, Richard Joseph Saia, William Andrew Hennessy |
1996-04-23 |
| 4998151 |
Power field effect devices having small cell size and low contact resistance |
Charles Steven Korman, Krishna Shenai, Bantval J. Baliga, Patricia A. Piacente, Bernard Gorowitz +1 more |
1991-03-05 |
| 4901127 |
Circuit including a combined insulated gate bipolar transistor/MOSFET |
Bantval J. Baliga |
1990-02-13 |
| 4862242 |
Semiconductor wafer with an electrically-isolated semiconductor device |
Eric J. Wildi |
1989-08-29 |
| 4823176 |
Vertical double diffused metal oxide semiconductor (VDMOS) device including high voltage junction exhibiting increased safe operating area |
Bantval J. Baliga, Hsueh-Rong Chang |
1989-04-18 |
| 4801986 |
Vertical double diffused metal oxide semiconductor VDMOS device with increased safe operating area and method |
Hsueh-Rong Chang, Bantval J. Baliga |
1989-01-31 |
| 4717679 |
Minimal mask process for fabricating a lateral insulated gate semiconductor device |
Bantval J. Baliga |
1988-01-05 |
| 4620211 |
Method of reducing the current gain of an inherent bipolar transistor in an insulated-gate semiconductor device and resulting devices |
Bantval J. Baliga, Victor A. K. Temple |
1986-10-28 |
| 4429011 |
Composite conductive structures and method of making same |
Manjin J. Kim |
1984-01-31 |
| 4333965 |
Method of making integrated circuits |
Mario Ghezzo |
1982-06-08 |
| 4227944 |
Methods of making composite conductive structures in integrated circuits |
Dale M. Brown, James F. Gibbons, Paul Alan McConnelee |
1980-10-14 |
