Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8710664 | Wafer-level chip scale package | Efren M. Lacap, Charles Nickel | 2014-04-29 |
| 8106516 | Wafer-level chip scale package | Efren M. Lacap, Charles Nickel | 2012-01-31 |
| RE36893 | Anti-fuse structure for reducing contamination of the anti-fuse material | Dipankar Pramanik | 2000-10-03 |
| 6015732 | Dual gate oxide process with increased reliability | Jon R. Williamson | 2000-01-18 |
| 5763937 | Device reliability of MOS devices using silicon rich plasma oxide films | Vivek Jain, Dipankar Pramanik, Kuang-Yeh Chang | 1998-06-09 |
| 5638006 | Method and apparatus for wafer level prediction of thin oxide reliability using differentially sized gate-like antennae | Calvin T. Gabriel | 1997-06-10 |
| 5602056 | Method for forming reliable MOS devices using silicon rich plasma oxide film | Vivek Jain, Dipankar Pramanik, Kuang-Yeh Chang | 1997-02-11 |
| 5587332 | Method of making flash memory cell | Kuang-Yeh Chang, William J. Boardman | 1996-12-24 |
| 5573970 | Method for reducing contamination of anti-fuse material in an anti-fuse structure | Dipankar Pramanik | 1996-11-12 |
| 5548224 | Method and apparatus for wafer level prediction of thin oxide reliability | Calvin T. Gabriel | 1996-08-20 |
| 5492865 | Method of making structure for suppression of field inversion caused by charge build-up in the dielectric | Vivek Jain, Dipankar Pramanik, Kuang-Yeh Chang | 1996-02-20 |
| 5493146 | Anti-fuse structure for reducing contamination of the anti-fuse material | Dipankar Pramanik | 1996-02-20 |
| 5470775 | Method of forming a polysilicon-on-silicide capacitor | — | 1995-11-28 |
| 5374833 | Structure for suppression of field inversion caused by charge build-up in the dielectric | Vivek Jain, Dipankar Pramanik, Kuang-Yeh Chang | 1994-12-20 |
| 5371393 | EEPROM cell with improved tunneling properties | Kuang-Yeh Chang | 1994-12-06 |
| 5328865 | Method for making cusp-free anti-fuse structures | William J. Boardman, David P. Chan, Kuang-Yeh Chang, Calvin T. Gabriel, Vivek Jain | 1994-07-12 |
| 5290734 | Method for making anti-fuse structures | William J. Boardman, David P. Chan, Kuang-Yeh Chang, Calvin T. Gabriel, Vivek Jain | 1994-03-01 |
| 5290727 | Method for suppressing charge loss in EEPROMs/EPROMS and instabilities in SRAM load resistors | Vivek Jain, Dipankar Pramanik | 1994-03-01 |
| 5218511 | Inter-silicide capacitor | — | 1993-06-08 |
| 5198381 | Method of making an E.sup.2 PROM cell with improved tunneling properties having two implant stages | Kuang-Yeh Chang | 1993-03-30 |
| 5128279 | Charge neutralization using silicon-enriched oxide layer | Dipankar Pramanik | 1992-07-07 |
| 5120679 | Anti-fuse structures and methods for making same | William J. Boardman, David P. Chan, Kuang-Yeh Chang, Calvin T. Gabriel, Vivek Jain | 1992-06-09 |
| 5057897 | Charge neutralization using silicon-enriched oxide layer | Dipankar Pramanik | 1991-10-15 |