Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12223010 | Methods and circuits of spatial alignment | Mudit Bhargava, Saurabh Sinha, Rahul Mathur | 2025-02-11 |
| 12159659 | Ramp write techniques | Mudit Bhargava, Pranay Prabhat, Fernando Garcia Redondo | 2024-12-03 |
| 12086453 | Memory for an artificial neural network accelerator | Mudit Bhargava, Paul Nicholas Whatmough, Zhi-Gang Liu | 2024-09-10 |
| 12080378 | Circuits and methods of detecting at least partial breakdown of canary circuits | Fernando Garcia Redondo, Pranay Prabhat, Mudit Bhargava | 2024-09-03 |
| 12061853 | Multi-dimensional network interface | Rainer Herberholz | 2024-08-13 |
| 11966785 | Hardware resource configuration for processing system | Dam Sunwoo, Saurabh Sinha, Jaekyu Lee, Jose Alberto Joao, Krishnendra Nathella | 2024-04-23 |
| 11693796 | Multi-dimensional data path architecture | Paul Nicholas Whatmough, Zhi-Gang Liu, Saurabh Sinha, Matthew Mattina | 2023-07-04 |
| 11682432 | Multi-tier memory architecture | Saurabh Sinha, Shidhartha Das, Mudit Bhargava, Rahul Mathur | 2023-06-20 |
| 11569824 | Digital sampling techniques | Shidhartha Das, Yunpeng Cai | 2023-01-31 |
| 11526305 | Memory for an artificial neural network accelerator | Mudit Bhargava, Paul Nicholas Whatmough, Zhi-Gang Liu | 2022-12-13 |
| 11521680 | Memory device with on-chip sacrificial memory cells | Fernando Garcia Redondo, Mudit Bhargava, Pranay Prabhat | 2022-12-06 |
| 11409617 | Hardware bit-vector techniques | Emily Ruppel, Parameshwarappa Anand Kumar Savanth, Wei Wang | 2022-08-09 |
| 11211111 | CAM device with 3D CAM cells | Rahul Mathur, Mudit Bhargava, Andy Wangkun Chen | 2021-12-28 |
| 11081469 | Three-dimensional integrated circuit test and improved thermal dissipation | Saurabh Sinha, Joel Thornton Irby | 2021-08-03 |
| 11011227 | Method, system and device for non-volatile memory device operation | Shidhartha Das, Mudit Bhargava, Saurabh Sinha, James Edwards Myers | 2021-05-18 |
| 10726908 | Switched source lines for memory applications | Pranay Prabhat, James Edward Myers | 2020-07-28 |
| 10037295 | Apparatus and methods for generating a selection signal to perform an arbitration in a single cycle between multiple signal inputs having respective data to send | Sandunmalee Nilmini Abeyratne, Ronald George Dreslinski, Reetuparna Das, Trevor Nigel Mudge, David Theodore Blaauw | 2018-07-31 |
| 9514074 | Single cycle arbitration within an interconnect | Sandunmalee Nilmini Abeyratne, Ronald George Dreslinski, Reetuparna Das, Trevor Nigel Mudge, David Theodore Blaauw | 2016-12-06 |
| 9396795 | Storage device supporting logical operations, methods and storage medium | David Theodore Blaauw | 2016-07-19 |