Issued Patents All Time
Showing 1–25 of 63 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12411670 | Analysis assistant for determining execution inefficiencies in dataflow programs | Blaine Rister, Qingjian Li, Bowen Yang, Junjue Wang, Chen Liu +2 more | 2025-09-09 |
| 12367022 | Method and system to determine execution inefficiencies in dataflow programs | Blaine Rister, Qingjian Li, Bowen Yang, Junjue Wang, Chen Liu +2 more | 2025-07-22 |
| 12340190 | Tensor checkpoint optimization in dataflow computing applications | Bowen Yang, Zhuo Chen, Fei Wang, Venkat Krishna SRINIVASAN, Chen Liu +2 more | 2025-06-24 |
| 12332837 | Sorting the nodes of an operation unit graph for implementation in a reconfigurable processor | Hong SUH | 2025-06-17 |
| 12332836 | Estimating a scaled cost of implementing an operation unit graph on a reconfigurable processor | Yue Fu, Kin Hing Leung, Joshua Brot, Arvind Krishna Sujeeth, Andrew Deng +1 more | 2025-06-17 |
| 12321843 | Lossless tiling in convolution networks—data flow logic | Tejas Nagendra Babu Nama, Ruddhi Chaphekar, Ram Sivaramakrishnan, Raghu Prabhakar, Junjue Wang +4 more | 2025-06-03 |
| 12306783 | Top level network and array level network for reconfigurable data processors | Gregory F. Grohoski, Mark Luttrell, Raghu Prabhakar, Ram Sivaramakrishnan, Manish K. Shah | 2025-05-20 |
| 12282448 | Routing method based on a sorted operation unit graph for an iterative placement and routing on a reconfigurable processor | Hong SUH | 2025-04-22 |
| 12267256 | Dynamic destination id in an array level network of a reconfigurable dataflow processor | Ram Sivaramakrishnan, Mark Luttrell, Raghu Prabhakar, Gregory F. Grohoski | 2025-04-01 |
| 12236220 | Flow control for reconfigurable processors | Weiwei Chen, Raghu Prabhakar, David Alan KOEPLINGER, Sitanshu Gupta, Ruddhi Chaphekar +1 more | 2025-02-25 |
| 12210953 | Lossless tiling in convolution networks—section cuts | Tejas Nagendra Babu Nama, Ruddhi Chaphekar, Ram Sivaramakrishnan, Raghu Prabhakar, Junjue Wang +4 more | 2025-01-28 |
| 12112250 | Lossless tiling in convolution networks—resetting overlap factor to zero at section boundaries | Tejas Nagendra Babu Nama, Ruddhi Chaphekar, Ram Sivaramakrishnan, Raghu Prabhakar, Junjue Wang +4 more | 2024-10-08 |
| 12079156 | Lossless tiling in convolution networks—materialization of tensors | Tejas Nagendra Babu Nama, Ruddhi Chaphekar, Ram Sivaramakrishnan, Raghu Prabhakar, Junjue Wang +4 more | 2024-09-03 |
| 12001936 | Lossless tiling in convolution networks—graph metadata generation | Tejas Nagendra Babu Nama, Ruddhi Chaphekar, Ram Sivaramakrishnan, Raghu Prabhakar, Junjue Wang +4 more | 2024-06-04 |
| 11995529 | Lossless tiling in convolution networks—tiling configuration for a sequence of sections of a graph | Tejas Nagendra Babu Nama, Ruddhi Chaphekar, Ram Sivaramakrishnan, Raghu Prabhakar, Junjue Wang +4 more | 2024-05-28 |
| 11983140 | Efficient deconfiguration of a reconfigurable data processor | Manish K. Shah, Ram Sivaramakrishnan, Mark Luttrell, David Brian Jackson, Raghu Prabhakar +2 more | 2024-05-14 |
| 11934343 | Lossless tiling in convolution networks-backward pass | Tejas Nagendra Babu Nama, Ruddhi Chaphekar, Ram Sivaramakrishnan, Raghu Prabhakar, Junjue Wang +4 more | 2024-03-19 |
| 11928512 | Quiesce reconfigurable data processor | Raghu Prabhakar, Manish K. Shah, Pramod Nataraja, David Brian Jackson, Kin Hing Leung +2 more | 2024-03-12 |
| 11893424 | Training a neural network using a non-homogenous set of reconfigurable processors | Martin Russell Raumann, Qi ZHENG, Bandish B. Shah, Ravinder Kumar, Kin Hing Leung +1 more | 2024-02-06 |
| 11886931 | Inter-node execution of configuration files on reconfigurable processors using network interface controller (NIC) buffers | Ram Sivaramakrishnan, Emre Ali Burhan, Manish K. Shah, Raghu Prabhakar, Ravinder Kumar +8 more | 2024-01-30 |
| 11886930 | Runtime execution of functions across reconfigurable processor | Ram Sivaramakrishnan, Emre Ali Burhan, Manish K. Shah, Raghu Prabhakar, Ravinder Kumar +8 more | 2024-01-30 |
| 11847395 | Executing a neural network graph using a non-homogenous set of reconfigurable processors | Martin Russell Raumann, Qi ZHENG, Bandish B. Shah, Ravinder Kumar, Kin Hing Leung +1 more | 2023-12-19 |
| 11841811 | Instrumentation networks for data flow graphs | Raghu Prabhakar, Matthew Thomas Grimm, Kin Hing Leung, Sitanshu Gupta, Yuan Lin +1 more | 2023-12-12 |
| 11816560 | Performance estimation-based resource allocation for reconfigurable architectures | Zhuo Chen | 2023-11-14 |
| 11782856 | Compile time instrumentation of data flow graphs | Raghu Prabhakar, Matthew Thomas Grimm, Kin Hing Leung, Sitanshu Gupta, Yuan Lin +1 more | 2023-10-10 |