Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5998278 | Method of fabricating shallow trench isolation structures using a oxidized polysilicon trench mask | — | 1999-12-07 |
| 4876214 | Method for fabricating an isolation region in a semiconductor substrate | Tadanori Yamaguchi, Evan E. Patton, Eric Lane | 1989-10-24 |