Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6483045 | Via plug layout structure for connecting different metallic layers | Mu-Chun Wang, Shih-Chieh Kao, Yuan-Chang Liu | 2002-11-19 |
| 6479870 | ESD device with salicide layer isolated by shallow trench isolation for saving one salicide block photomask | Shiao-Shien Chen, Tien-Hao Tang | 2002-11-12 |
| 6291285 | Method for protecting gate oxide layer and monitoring damage | Mu-Chun Wang | 2001-09-18 |
| 6245610 | Method of protecting a well at a floating stage | Mu-Chun Wang, Tzung-Han Lee | 2001-06-12 |
| 6229347 | Circuit for evaluating an asysmetric antenna effect | Mu-Chun Wang, Chau-Neng Wu | 2001-05-08 |
| 6191602 | Wafer acceptance testing method and structure of a test key used in the method | Mu-Chun Wang, Kun-Cho Chen | 2001-02-20 |
| 6184122 | Method for preventing crosstalk between conductive layers | Kuan-Yu Fu | 2001-02-06 |
| 6052269 | Electrostatic discharge protection circuit using point discharge | Tien-Hao Tang, Kuan-Yu Fu | 2000-04-18 |
| 5990519 | Electrostatic discharge structure | Tien-Hao Tang, Kuan-Yu Fu | 1999-11-23 |